30 results about "Chaotic modulation" patented technology

A chaotic communication system employs transmitting and receiving chaotic oscillating circuits. One improvement to first-generation systems is the ability to modulate a nonreactive element in the transmitting circuit, thus increasing modulation bandwidth. Other features include insertion of a gain control amplifier in a chaotic receiver; signal filtering in chaotic transmitters and receivers; use of chaotic modulation techniques for cellular telephony applications; dual-transmitter and receiver systems; a dual receiver synchronization detector; interfaces to communication systems; analog chaotic signal modulation; use of multiple chaotic transmitters and receivers; digital algorithm improvement using a cube-law nonlinear component; a Gb-only receiver; a Gb-only transmitter; and positive slope transmitter and receiver systems.

A PPB-CM communication system and method. The PPB-CM communication system includes a transmitter which splits a symbol period, which is a transmission unit of a communication signal, into at least a pair of parts, inserts a data signal into one of the parts, and transmits a communication signal having the data signal inserted; and a receiver which receives the communication signal from the transmitter and determines bit information of the symbol period according to which part of the symbol period has the data signal inserted, as determined by comparison of energy levels of the parts. Accordingly, a separate threshold is not required to determine the data bit of the symbol period. Thus, the communication signal can be accurately determined. Also, the communication system can be simply implemented without need of a delay line.

The invention discloses an encryption and decryption method based on a unified chaotic system. Chaos modulation and chaos covering technologies are adopted to achieve multi-level encryption; the characteristics of a unified chaotic system are utilized, the unified chaotic system is switched among different types of chaotic systems by modulating system parameters, the system property is more complex, meanwhile, synchronization with a sending end system is realized by utilizing an encrypted signal, and a decryption signal is obtained by utilizing the synchronized system and adopting a decryptionprocess opposite to that of the sending end. The method can be used for secret communication in the national defense communication field and can also be applied to the civil secret communication service industry, secret signals can be disguised as random white noise in reality due to the pseudo-random property of the chaotic system, and the method has good application value.

The invention provides a repetitive correlation delay shift keying method for improving performance of a wireless chaos communication system. According to the method, a switch is added to a correlation delay shift keying (CDSK) emission end, namely an emission end of a repetitive correlation delay shift keying R-CDSK is in two symbol periods, a chaos modulation signal and a differential chaos modulation signal corresponding to one same information are continuously sent, and a common reference chaos signal of the chaos modulation signal and the differential chaos modulation signal is further sent. The method makes full of time diversity of a wireless channel, a transmission bit error rate is reduced through repetitively sending the mutually-differential chaos modulation signals, CDSK reliability is effectively improved, moreover, the information sent by the R-CDSK is a differential modulation symbol of the bearing information, so safety communication performance of the system is improved. Compared with schemes in the prior art, the method has relatively lower complexity, and an information transmission mode which is more reliable than a CDSK mode and is safer than a DCSK mode is realized.

The invention relates to a different-dimensional switchable chaotic system design method and a circuit; a four-dimensional hyper-chaos system is constructed by adding variables and feeding back control items based on a three-dimensional generalized Lorenz system family; and a switchable different-dimensional chaotic circuit is designed through a plurality of switch controllers in Multisim software. An analog circuit constructed by the invention is convenient to use and easy to realize by hardware, and has relatively lower cost; the designed switchable circuit not only can flexibly realize the switching between a three-dimensional chaotic system and the four-dimensional hyper-chaos system, but also can return to realize the switch among three chaotic systems in the same dimension; and the systems can serve as practical chaotic modulation and chaotic encryption signals, and can be widely applied to the field of information security cryptography with higher requirements on confidentiality and reliability.

The invention discloses a digital signal processor (DSP) Builder-based time-varying delay hyperchaos digital circuit design method and a DSP Builder-based time-varying delay hyperchaos digital circuit design circuit. The method comprises the following steps of: expanding a three-dimensional classical system Lu into a novel four-dimensional supersystem, performing discretization processing on a hyperchaos system Lu through an optimized discretization equation, and designing a digital circuit realizing a hyperchaos system group; designing digital integrator which conveniently adjusts sampling frequency; and respectively introducing a fixed time delay and time-varying delay controller into a digital system to form a time-varying delay hyperchaos digital circuit. The circuit has high time-varying delay hyperchaos sequence randomness and high generating speed, and the circuit adopts simple logical and algebraic operation, is conveniently realized by using hardware and is relatively low in cost. Moreover, a time-varying delay hyperchaos sequence generated by the digital circuit has extremely high complexity and stability, can serve as a practical chaotic modulation and chaotic encryption signal, and can be widely applied to the field of information security cryptography with higher requirements on confidentiality and reliability.

The invention discloses a blind estimation bit synchronization method for a differential chaotic modulation communication system and relates to a bit synchronization method based on the chaotic spread spectrum technology in the field of digital mobile communication. The invention provides the blind estimation bit synchronization method for the differential chaotic modulation communication system.In the blind estimation bit synchronization method, the characteristics of carrier waveform repetition and energy conservation of reference and modulation parts in a differential chaotic modulation signal are utilized, a local relative maximum value which is more than a synchronous threshold is searched and is used as an initial synchronization point of a local clock, and a digital phase-locked loop is used to perform the tracking synchronous adjustment of subsequent relative peak value, so that the establishing speed and accuracy of the bit synchronization are considered.

An all-digital spread-spectrum type communications system employing chaotic symbol modulation. The system includes a transmitter having a symbol mapper that converts a series of information bits to a series of bit symbols, a digital chaos modulator employing an M-ary chaotic shift keying (M-CSK) architecture for chaotically spreading the bit symbols in the digital domain, where the chaos modulator includes a separate chaos generator for each of the M-CSK symbols, and a digital-to-analog converter (DAC) for converting the chaotic modulated bit symbols to an analog signal for transmission. The system also includes a receiver responsive to the analog signal from the transmitter and generating a received signal therefrom. The receiver performs signal acquisition and tracking on the received signal using a look-up table, a transmitter ID and a receiver ID in the received signal, de-spreading and de-modulation on the received signal and bit removal from the symbols in the received signal.