56results about How to "Increase wiring area" patented technology

A point-to-point bus and a daisy chain bus are provided for supplying signals to stacked memories, and the stacked memories are mounted mutually apart by a distance equivalent to the length of the stacked memory on both surfaces of a module substrate. Furthermore, the memory chips arranged in a stacked memory mounted on one surface are set in an active state at the same time alternately with the memory chips arranged in a stacked memory mounted on another surface of the module substrate.

A semiconductor device has a ZQ circuit (40) which generates impedance control information and an output buffer having an impedance controlled in response to the impedance control information. A plurality of control bits constituting the impedance control information are serially transferred from the ZQ circuit.

A light-emitting module includes a power transmitting substrate disposed adjacent to a light guide plate (LGP). The power transmitting substrate includes first and second substrate portions positioned substantially perpendicular to each other. The first substrate portion faces a light incident surface of the LGP. The second substrate portion extends from the first substrate portion and is substantially parallel with a counter surface of the LGP. First and second light sources respectively emit light from a top and a side thereof, and are respectively mounted on the first and second substrate portions. The first and second light sources respectively emit light to the light incident surface. A receiving container supports the light-emitting module and contains the LGP.

Signal lines which provide electric connections from an internal circuit formed on a main surface of a semiconductor chip and including, for example, MIS transistor to protective elements constituted by, for example, diodes are drawn out from outlet ports formed on wiring lines disposed between the protective elements, and a signal line region occupied by the signal lines is provided over the protective elements and under electrode pads. A wiring region on the main surface of the semiconductor chip can be enlarged without increasing the chip area.

A parallel plate capacitor formed in the back end of an integrated circuit employs conductive capacitor plates that are formed simultaneously with the other interconnects on that level of the back end (having the same material, thickness, etc). The capacitor plates are set into the interlevel dielectric using the same process as the other interconnects on that level of the back end (preferably dual damascene). Some versions of the capacitors have perforations in the plates and vertical conductive members connecting all plates of the same polarity, thereby increasing reliability, saving space and increasing the capacitive density compared with solid plates.

Signal lines which provide electric connections from an internal circuit formed on a main surface of a semiconductor chip and including, for example, MIS transistor to protective elements constituted by, for example, diodes are drawn out from outlet ports formed on wiring lines disposed between the protective elements, and a signal line region occupied by the signal lines is provided over the protective elements and under electrode pads. A wiring region on the main surface of the semiconductor chip can be enlarged without increasing the chip area.

A parallel plate capacitor formed in the back end of an integrated circuit employs conductive capacitor plates that are formed simultaneously with the other interconnects on that level of the back end (having the same material, thickness, etc). The capacitor plates are set into the interlevel dielectric using the same process as the other interconnects on that level of the back end (preferably dual damascene). Some versions of the capacitors have perforations in the plates and vertical conductive members connecting all plates of the same polarity, thereby increasing reliability, saving space and increasing the capacitive density compared with solid plates.

A wiring area on a substrate is expanded and the width of the substrate is reduced to achieve a smaller display device at lower cost. The display device includes a display panel, a circuit board, and a flexible printed circuit board connecting the display panel and the circuit board, and the circuit board and the flexible printed circuit board are electrically connected to each other via an anisotropic conductive film. Crimp contacts 15 in the mounting area of the flexible printed circuit board 11 and crimp dummy terminals 16 outside the mounting area are provided on the circuit board, and some of the crimp dummy terminals act as test terminals 18 for crimp resistance measurement, and the crimp contacts 15 and the test terminals 18 are electrically connected to each other on the circuit board.

A wiring design system when applied to wiring boards having various wiring restrictions, has a rough wiring plan at the floor plan stage so as to complete a wiring design satisfying the wiring restrictions in a short period of time while evaluating the congestion degree of the wiring. Logical connection information for wiring parts and signal group information for handling the connection information is input as a signal group. The signal group is handled as a wiring unit for a wiring path search and the signal group is divided into smaller groups. An optimum path is then determined in such a way that the divided smaller groups run adjacent to one another whenever appropriate.

The invention discloses a fabrication method of a multi-layer printed circuit board (PCB) and the multi-layer PCB. The method comprises the following steps of: respectively etching a first bonding pad and a second bonding pad on a first preset region on the PCB at the top layer and a second preset region, corresponding to the first preset region, on the PCB at the bottom layer for welding jack component pins or welding the jack component pins and connecting signal wiring at the layer where the first bonding and the second bonding pad are located; etching a third bonding pad for connecting signal wiring of a conversion layer on a third preset region which is in correspondence to the first preset region and is on the conversion layer required for wiring on the PCB at the inner layer; etching the conversion layer which is not required for wiring on the PCB at the inner layer and a metal foil in a fourth preset region corresponding to the first preset region; and aligning the PCBs of all layers and laminating, drilling in the first preset region, the second preset region, the third preset region and the fourth preset region to form metallic through holes for installing a jack component in an inserted way. By the method, the problem of difficulty in achieving the design of a high-density interconnected PCB is solved, the fabrication of the high-density interconnected PCB is promoted, and the fabrication cost is reduced.

A coil spring is formed by winding a wire in a coil shape. In the cross sectional shape of the wire formed in the coil shape, the inner diameter side part in the coil shape includes a semi-elliptical shape having a major radius and a minor radius and the outer diameter side part in the coil shape includes a curved shape circumscribing a circumscribed circle having a radius larger than the minor radius, arc shapes having a curvature larger than the curvature of the circumscribed circle, and linear shapes connecting both ends of the arc shapes to both ends of the semi-elliptical shape. This can increase the cross sectional shape of the wire, reduce a shearing stress, and improve the durability of the coil spring.

A dynamically reconfigurable processor having a wiring structure which enables flexible mapping of a program to the processor with a small wiring area is provided. The dynamically reconfigurable processor comprises: a first arithmetic circuit group composed of arithmetic circuits of a type Ai (i=1, 2, . . . , N); a second arithmetic circuit group composed of a part of an arithmetic circuit group included in the first arithmetic circuit group and an arithmetic circuit group of a type B which is connected thereto and different from the arithmetic circuit of the type Ai; inter-arithmetic-circuit wires mutually connecting the arithmetic circuits of the type Ai and the arithmetic circuits of the type B; and a switch group which causes the inter-arithmetic-circuit wires in the second arithmetic circuit group to be inter-arithmetic-circuit wires different from other inter-arithmetic-circuit wires and changes the connection order between the arithmetic circuits in the second arithmetic circuit group.

The invention discloses a flexible circuit board which comprises a flexible circuit board body and a first additional flexible circuit board. The flexible circuit board body comprises a mounting area and a bending area which are connected with each other. The first additional flexible circuit board is laminated on the mounting area. The surface area of the first additional circuit board is smaller than or equal to that of the mounting area. The thicknesses of portions which require bending and winding on the flexible circuit board are small, and furthermore the flexible circuit board has high flexibility. Furthermore, the number of layers at a portion which requires multiple wirings on the flexible circuit board is large, thereby enlarging wiring area. The invention furthermore discloses a terminal.

The invention provides an HDI printed circuit board manufacturing method and an HDI printed circuit board. The HDI printed circuit board manufacturing method comprises the steps of core board pretreatment, pressing and pattern transfer, pattern plating and post process. According to the invention, a blind hole and a mechanical buried hole are combined through four lamination steps; the wiring areais maximized; the problems of delamination and poor blistering in the existing manufacturing process are solved; a copper reduction process is added after each lamination step; all holes are plated through spot plating, which ensures that the copper thickness of an etched circuit does not exceed 12 microns; and the method improves the production yield, reduces the production cycle, and reduces the cost.

The display device includes display drivers including first and second ones operable to output, based on display data, gradation signals to source lines of display panel regions. The display device is arranged to be able to suppress the variation in output voltage between display drivers while minimizing the increases in chip area of the display drivers and in wiring area of a display panel and keeping high noise resistance. Each display driver can generate gray scale reference voltages for producing gradation signals corresponding to display data. The first display driver can sequentially transmit gray scale reference voltages generated by itself to the second display driver. Based on the transmitted gray scale reference voltages, the second display driver makes the first display driver execute calibration for decreasing the absolute value of difference between gray scale reference voltages generated by the first and second display drivers, or executes the calibration by itself.

The invention discloses a plug-in card fixing structure, which comprises a substrate, a card edge connector and a support frame, wherein the card edge connector is positioned on the substrate to connect a plug-in card with the card edge connector in the direction approximately parallel to the substrate; the support frame is provided with a bottom board, two lateral plates and two fixing pieces; the bottom board is attached and fixed on the substrate; the two lateral plates extend outwards from two sides of the bottom board; the two fixing pieces are positioned on the top edges of the lateral plates; and the bottom board is selectively fixed on one of a plurality of positions of the substrate to make the two fixing pieces to fix one side of the plug-in card, which is not connected with the card edge connector. The fixing structure can reduce the bore number of the substrate, relatively increase the wiring area of the circuit boards and improve the stability of the plug-in card.

A wire cloth, in particular a paper making wire cloth, has at least two fabric layers (1B, 1T; 2B, 2T), including an upper fabric layer made of wires in the making direction (101, 110) and wires in the cross direction (121, 130), and a lower fabric layer made of wires in the making direction and wires in the cross direction (141, 145). Wire bridges are formed for the individual fabric layers in such a way that they extend over a predeterminable distance within a pattern repeat without being tied to other wires. The wire bridges of the upper cross direction wires extend within a pattern repeat over at least nine making direction wires and under maximum one making direction wire. The wire bridges of the lower cross direction wires extend within the pattern repeat at least under six and over two making direction wires. Between two making direction wires extending over a cross direction wire, at least one other making direction wire extends under the same cross direction wire.

The invention discloses a circuit board and a manufacturing method. The circuit board comprises a substrate. A first insulation layer is disposed on the substrate, and is provided with a plurality of first openings. A plurality of first conductive parts are disposed on the first insulation layer at intervals, and are correspondingly disposed in the first openings in a filled manner. A second insulation layer is disposed on the first insulation layer, and is provided with a plurality of second openings to expose the first conductive parts. A plurality of second conductive parts are disposed on the second insulation layer at intervals, and are disposed in the second openings in a filled manner. The second openings are smaller than the first openings. The invention is advantageous in that the counterpoint ability of the technique can be improved, and the wiring area, the transmission speed, and the transmission direction of the printed circuit board in the limited space can be increased, and the high density requirement can be satisified. The difficulty of the laser drilling, the resin smear removal or the electroplating techniques can be reduced, the possibility of faults can be reduced, and the quality of the printed circuit board can be improved.

The present application provides a touch display panel, including a substrate, multiple electrodes disposed on the substrate, and a driver chip. The electrode is connected to the driver chip by a wiring, wherein at least part of the wiring and the electrode are located in different layers.

The invention relates to a driving power supply, in particular to a transformer contained driving power supply for an LED lighting system. The driving power supply comprises a transformer and circuit boards, wherein a secondary control circuit and a primary control circuit of the transformer are arranged on the circuit boards, and the circuit boards include a first circuit board, a second circuitboard and a third circuit board, wherein the first circuit board and the second circuit board are basically arranged in parallel vertically, the bottom end of the first circuit board is fixedly connected with a terminal post of a secondary output port of the transformer, and the bottom end of the second circuit board is fixedly connected with a terminal post of a primary input port of the transformer; both ends of the third circuit board are fixed between the top ends of the first circuit board and the second circuit board in a bridge connection mode. Because of the technical characteristics and advantages, the driving power supply can be applied to an LED driving power supply product requiring a compact structure.

The embodiment of the invention provides a manufacturing method of a circuit board, which comprises the steps as follows: a core layer is provided, which comprises a first dielectric layer, a first metal layer and a second metal layer; a through hole is formed on the core layer; the core layer is arranged on a support board, an in-built element is arranged in the through hole, the second metal layer contacts with the support board, the in-built element is provided with at least one electrode contact, which contacts with the support board; the in-built element is fixed in the through hole; the support board is removed; the first metal layer and the second metal layer are removed, the thickness of the electrode contact of the in-built element is lessened; a third metal layer and a fourth metal layer are formed respectively, wherein, the fourth metal layer is electrically connected with the electrode contact of the in-built element; the third metal layer and the fourth metal layer are patterned, thereby forming a first patterned wiring layer and a second patterned wiring layer. The embodiment of the invention can lessen the thickness of an electrode contact of an in-built element through a reduction technique.

The invention discloses a novel electric energy meter wiring terminal which comprises: a wiring unit which comprises a fixing piece, a connecting piece connected with the fixing piece and a first conductive piece connected with the connecting piece; and an external connection unit which comprises a sleeve and a second conductive part located in the sleeve; the first conductive part is in contact with the second conductive part; a wiring unit arranged in the device is fixedly connected to an original interface of the electric energy meter; when the electric energy meter is wired, the arranged external connection unit is directly inserted into the wiring unit after being connected with a wire; and the wiring area of the wiring terminal is increased, the problem that the contact surface is too small to bear the passing current to burn out the ammeter is avoided, the operation and maintenance cost of the ammeter and the labor intensity and operation risk of operators are reduced, and a solid foundation is laid for the safe and stable operation of a power grid.

A kind of circuit board producing method which is applied to circuit enclosing, before the printed circuit board is etched, the surface of line is processed, metal layer which fulfills circuit board producing (COB) is plated; high-low current effect generated by area when wiring can be avoided, and phenomenon that difference of metal layer of circuit board producing (COB) is too big can be avoided; beside, surface of circuit board producing (COB) does not need wire, so area of wiring during design can be increased.

The invention relates to a ceramic heating body and a manufacturing method thereof. The ceramic heating body comprises a ceramic core rod and a multi-layer composite structure laminated and wound on the ceramic core rod, wherein the multi-layer composite structure and the ceramic core rod are sintered and molded together, the multi-layer composite structure at least comprises a heating circuit layer and a temperature measurement circuit layer, the heating circuit layer comprises a first ceramic chip and a heating circuit formed on the first ceramic chip, the temperature measurement circuit layer comprises a second ceramic chip and a temperature measurement circuit formed on the second ceramic chip, and the heating circuit layer and the temperature measurement circuit layer are respectivelyprovided with a through hole so as to lead out a wire from the corresponding circuit layer. According to the LED patch nixie tube, the probability of short circuit of different circuits on the ceramic heating body is greatly reduced, the wiring area is greatly increased, the design range is widened, the circuit distribution mode is diversified, the overall horizontal area is reduced, the number of turns of winding is reduced, and difficulty of the winding process is greatly reduced.

The invention discloses a ball grid array printed circuit board, which is provided with a first pad array comprising at least two pad queues. Various first pads in the first pad queue adjacent to an outlet side of the first pad array are interleaved with various second pads in the second pad queue adjacent to the first pad queue and far away from the outlet side, and the spacing between two adjacent first pads is set to be equal to or greater than 3 times the outlet wire width of each second pad, so that each second pad outputs a wire from between the two first pads adjacent thereto. In this way, the number of pads that output a wire on the surface of the ball grid array printed circuit board is increased, the number of openings on the circuit board is reduced, the effective wiring area of the circuit board is increased, the component integration degree of the circuit board is increased, the size of the circuit board is reduced to a certain extent, the portability of electronic equipment is improved, and thus, the user's satisfaction with the use of the electronic equipment is improved.

The invention relates to the technical field of communication equipment, and discloses intelligent wearable electronic equipment. The intelligent wearable electronic equipment comprises a dial plate part, a watch strap part, an antenna support and an antenna, wherein a circuit mainboard and a battery are arranged in the dial plate part, the battery is electrically connected with the circuit mainboard, the watch strap part is connected with the dial plate part, the antenna support is arranged on the dial plate part or the watch strap part and is provided with an antenna arrangement surface, a plurality of bulges and / or pits are arranged in the antenna arrangement surface and extend along an extension direction of the antenna arrangement surface, the antenna is arranged in the bulges and / or pits, and the antenna is electrically connected to the circuit mainboard. In the intelligent wearable electronic equipment provided by the embodiment of the invention, the antenna arrangement surface is arranged to be a non-flat surface, namely, the plurality of bulges and / or pits are arranged on the antenna arrangement surface and are integratedly formed, the antenna is arranged in the bulges and / or pits during antenna arrangement, the wiring area of the antenna is expanded by the bulges and / or pits, the antennal is ensured to have enough wiring space, and the antenna performance of the intelligent wearable electronic equipment is improved.