A multi-
chip stacked
package structure, comprising: a lead-frame having a top surface a back surface, the inner leads comprising a plurality of first inner leads and a plurality of second inner leads in parallel; a first
chip fixedly connected to the back surface of the lead-frame, and the first
chip having an
active surface and a plurality of first pads adjacent to the central area of the
active surface; a plurality of first
metal wires electrically connected the first inner leads and the second inner leads and the first pads on the
active surface of the first chip; a second chip fixedly connected to the top surface of the lead-frame, and the second chip having an active surface and a plurality of second pads adjacent to the central area of the active surface; a pair of the spacers provided on the thermal fin of the lead-frame; a plurality of second
metal wires electrically connected to the top surface of first inner leads and the second inner leads and the second pads on the active surface of the second chip; and a
package body encapsulated the first chip, the plurality of
metal wires the second chip, the plurality of pads, the first inner leads and the second inner leads and to
expose the outer leads.