109 results about "Instruction step" patented technology

Solutions for solving a problem experienced by a user are retrieved. In response to receiving a query from the user describing the problem, relevant candidate solutions to the problem are sent to the user. In response to receiving a selection of one relevant candidate solution from the relevant candidate solutions, instructions steps within the one relevant candidate solution selected by the user are analyzed. An instruction step similarity is calculated between the instruction steps within the one relevant candidate solution selected and other instructions steps within other solutions stored in a storage device. Then, similar solutions are sent to the user containing similar instruction steps to the instruction steps contained within the one relevant candidate solution selected based on the calculated instruction step similarity.

An instructional hygiene method includes providing an instructional hygiene device, the instructional hygiene device configured to provide an instruction to a user during operation, and delivering said instruction from said instructional hygiene device to said user in response to activation of a user input of said instructional hygiene device. The instructional hygiene device can include a toothbrush or a dentifrice dispenser. The delivering an instruction step can include instructing the user regarding a tooth-brushing technique, instructing the user to move a toothbrush head in a circular motion, instructing the user to brush a tongue, and / or providing music to the user. In addition, the step of delivering the instruction can include retrieving the instruction from a memory of the instructional hygiene device.

The embodiment of the invention discloses a method for recovering a solid-state hard disc mapping table, comprising the following steps of: judging whether the modified information saved after saving the mapping table in a cache last time reaches a preset amount; if so, saving the mapping table in the cache and receiving the data written-in operation instruction which comprises logic address information of data; if not, triggering the step of receiving the data written-in operation instruction; modifying the mapping table in the cache according to the logic address information and saving the modified information; loading the saved mapping table to the cache when the solid-state hard disc is electrified, and recovering the mapping table loaded in the cache to be the mapping table during the last power down of the solid-state hard disc according to the modified information saved after modifying the mapping table in the cache. The embodiment of the invention ensures that the mapping table during the last power down of the solid-state hard disc can be recovered in short time.

Solutions for solving a problem experienced by a user are retrieved. In response to receiving a query from the user describing the problem, relevant candidate solutions to the problem are sent to the user. In response to receiving a selection of one relevant candidate solution from the relevant candidate solutions, instructions steps within the one relevant candidate solution selected by the user are analyzed. An instruction step similarity is calculated between the instruction steps within the one relevant candidate solution selected and other instructions steps within other solutions stored in a storage device. Then, similar solutions are sent to the user containing similar instruction steps to the instruction steps contained within the one relevant candidate solution selected based on the calculated instruction step similarity.

There is provided an information processing method which enhances the executing speed of a parallel processing computing device. A parallel processing block-forming step divides a program to be executed into a plurality of parallel processing blocks. A thread-forming step divides parallel processing blocks formed by the parallel processing block-forming step into a plurality of threads corresponding in number to the processors of a processor group. The processor group executes the threads generated by the thread-forming step. The instructing step instructs each of the processors to execute a thread of a next parallel processing block when it has terminated execution of a thread assigned thereto, and when a predetermined instruction is not given in the program.

When loading executable machine code into memories, the defective memory locations can be bypassed by properly inserting jump instructions or dummy memory allocation instructions in the program code. Prior to loading the executable code into the memories, defective memory locations are checked and recorded first. The source program code are analyzed to see which instruction step will fall into defective memory locations. Dummy memory space allocation instructions or additional jump instructions, are inserted in the original micro code, such that defective memory locations can be bypassed when the modified program code is loaded into the working memory space. The present invention is useful for loading executable programs in programmable and verifiable memories, such as Flash / EEPROM, EPROM, SRAM and DRAM, etc.

An application program that describes processing of a workpiece by the machine tool in form of instruction steps is disclosed. A computer executes the application program and step-by-step determines based on a simulation program machine-dependent control commands for a controller. The machine-dependent control commands depend on a virtual time base that is independent of an actual time base. The computer determines based on a computer-internal model of the machine tool and the determined machine-dependent control commands expected actual states of the machine tool, thereby simulating execution of the machine-dependent control commands by the machine tool. The simulation program is implemented as control software in the controller.

The related auto size marking method for 3D / 2D mold parameters assembly design comprises: 1. designing mold frame, determining all of the member size, mold nest and core quantity, distance among product, nest and template; 2. designing secondary structure by receiving computer command and calculating to generate slide block, slope pin, cooling loop, and other assembly; 3. executing whole assembly diagram command to generate 2D diagram; 4. alternating request, repeating step 2-3; 5. outputting the formal 2D diagram; 6. outputting the 2D member processing diagram. This invention has more reasonable process, improves design quality, and reduces manual error.

The replication of large amounts of data from a database source to a database target is often prone to failure when the amount of data exceeds the transaction capacity of the database. In other words, if the amount of data transfer during initial start-up fills the transaction log before the database changes are committed, then the transaction does not complete and the changes are rolled back. For a transaction to be completed and database changes to be made permanent, the transaction must be completed in its entirety. A method for initializing data propagation execution for a large data source according to an embodiment of the invention uses standard DBMS copy, rename and log clearing / cleaning utility applications to successfully complete an initial load process so that all necessary initialization fields are primed. The method steps create temporary database table names and structures and execute an initialization / cold start using a single data record to set a synchronization point marker. Upon validation of the single record initialization, the replication of the large data table proceeds in a continue / warm mode from the set synchronization point marker. Executable instruction steps and computer readable media incorporating the executable instruction steps are disclosed.

The invention relates to an SVN and JSHint integrated code detection method and system. The method includes the steps that a developer commits a source code to an SVN server; an SVN hook pre-commit is triggered; a version repository transmits corresponding parameters to the hook program, the hook program executes and calls a Nodejs module and runs JSHint instruction steps; the Nodejs module feeds a detection structure back to the SVN hook; the SVN hook determines whether to allow code commission or obstruct code commission according to the returned result, gives a detection result and informs the developer of the result, and if the SVN hook obstructs code commission, the developer carries out code modification until code commission. According to the SVN and JSHint integrated code detection method and system, by integrating an SVN version management tool and a JavaScript code detection tool JSHint, the system can automatically carry out code filtration, acquire a JavaScript file, carry out analysis and detection and inform the developer of the detection result rapidly when the developer commits the source code through SVN, the version commission JavaScript code quality is effectively improved, code standards are unified, and the software source core development quality and team development efficiency of software engineering are improved.

The present invention relates to a compound contents delivery method capable of reducing the network transmission quantity and of distributing the system processing load. The method according to the present invention comprises a compound contents element acquisition step of, in each of contents servers, acquiring a compound contents element undergoing a conversion into an encoding format for a portable terminal in corresponding relation to a contents portion which is an object of a fetching instruction in a contents portion fetching instruction step to return it to an intermediate apparatus and a production step of, in the intermediate apparatus, combining the compound contents elements returned from the contents servers according to time series on the basis of instruction information from a management server to produce compound contents oriented to the portable terminal.

A system and method for contextualizing operating procedures are provided. A set of procedures is provided, each including text describing user actions which are to be performed on a physical device to implement the procedure. A device model refers to components of the device on which user actions are performable and provides state charts which link an action performable on the respective component with states assumed by it. The text of each procedure is segmented to form a sequence of steps. Each step includes an action to be performed on one of the components of the device that is referred to in the device model. When a request for one of the procedures is received, the corresponding sequence of instruction steps is retrieved. A current one of the instruction steps is contextualized, based on device data received from the device and the state chart of the respective component.

A graphical user interface, implemented in a standard system management environment, accepts selections of logical instruction steps that are external to the standard system management environment. The logical instruction steps may include process steps, specify chemical formulae, or identify other components of master recipes that control drug manufacture or dispensing, as examples. The external logical instruction steps are introduced into the standard system management environment and approved. The standard system management environment subsequently controls the drug manufacturing or dispensing processes according to the external logical instruction steps.

An appendage wrap having a sequential set of graphic instruction steps printed across the length of the wrap on one or both sides for explaining and illustrating how a user is to apply the wrap to a specific appendage. Each individual instruction step is readily visible to the user and is easily discernable as the wrap is unrolled and wound around the appendage. Text instructions provide concise directions to the user. Simply illustrations of the appendage (hand graphics) provide a visual reference to the user for the direction and location where the wrap will be wound. Arrows are used to visually guide the user as wrap is unrolled and wound around the wrist.

The invention discloses a communication method of an I2C bus, belonging to the technical field of embedded communication and being applied to the 'read' communication mode of the I2C bus. The communication method of the I2C bus comprises the following steps: a host sends down an equipment address and a 'write' operation instruction to all equipment to be accessed; the host sends down the offset address of access data to all the equipment to be accessed; the equipment receives the data to generate interruption and store the offset address, and instantly addresses to corresponding data according to the offset address; the host sends down the equipment address of the equipment to be accessed and a 'read' operation instruction; the equipment receives the data to generate interruption and send down the data; and the host sends down a 'stop' instruction to the equipment to be accessed. The addressing operation used by the invention is instantly executed after the offset address is obtained in the generated interruption programs, thereby saving time for the preparation of sending data and achieving the beneficial effect of speed acceleration.

The invention relates to a method for controlling and / or monitoring the manufacturing process and / or dispensing process of medical drugs including the following: providing a graphical user interface (GUI) in a standard system management environment, such as an SAP environment in particular SAP R / 3 and / or mySAP; providing external logical instruction steps, in particular manually and / or automatically selecting external logical instruction steps, such as process steps and / or chemical formulas of a master recipe from an external database through the graphical user interface (GUI), wherein the external logical instruction steps are external to the standard system management environment; introducing the selected external logical instruction steps into the standard system management environment; approving the provision of the logical instruction steps in the standard system management environment; controlling and / or monitoring the process according to the provided instruction steps by the standard system management environment.

The present invention relates to a compound contents delivery method capable of reducing the network transmission quantity and of distributing the system processing load. The method according to the present invention comprises a compound contents element acquisition step of, in each of contents servers, acquiring a compound contents element undergoing a conversion into an encoding format for a portable terminal in corresponding relation to a contents portion which is an object of a fetching instruction in a contents portion fetching instruction step to return it to an intermediate apparatus and a production step of, in the intermediate apparatus, combining the compound contents elements returned from the contents servers according to time series on the basis of instruction information from a management server to produce compound contents oriented to the portable terminal.

The replication of large amounts of data from a database source to a database target is often prone to failure when the amount of data exceeds the transaction capacity of the database. In other words, if the amount of data transfer during initial start-up fills the transaction log before the database changes are committed, then the transaction does not complete and the changes are rolled back. For a transaction to be completed and database changes to be made permanent, the transaction must be completed in its entirety. A method for initializing data propagation execution for a large data source according to an embodiment of the invention uses standard DBMS copy, rename and log clearing / cleaning utility applications to successfully complete an initial load process so that all necessary initialization fields are primed. The method steps create temporary database table names and structures and execute an initialization / cold start using a single data record to set a synchronization point marker. Upon validation of the single record initialization, the replication of the large data table proceeds in a continue / warm mode from the set synchronization point marker. Executable instruction steps and computer readable media incorporating the executable instruction steps are disclosed.

The embodiment of the invention provides a smart home control method and system and a storage medium. The smart home control method includes the steps of identification, wherein identity information of a user and the type of a terminal are identified; pushing, wherein a feature template is pushed according to the identity information and the type of the terminal; obtaining of an instruction, wherein an operation instruction of the user is obtained; execution, wherein an operation is executed according to the operation instruction. Firstly, according to the identification step, the identity information of the user and the type of the terminal are identified; then, the feature template is pushed according to the identity information and the type of the terminal so that pushing information can meet the special requirement for the identity of the user, the personalized demands of the user are met, and the transmission requirements of the terminal can be met; finally, the operation instruction of the user is obtained and executed so that the smart home control method and system and the storage medium can better meet the demands of the user and realize quick deployment.

The invention relates to a design of an environment analysis apparatus for detecting one or more index to be analyzed, the environment analysis apparatus comprises a sensor and an actuator set, and a distributed control system with loose coupling composed of several subsystems capable of being independently triggered on a control technology and system internal bus, the several subsystems comprise an analysis flow control unit, and one or more opened type sub analysis systems for detecting difficult detection index, the opened type sub analysis systems provides various bottom layer operation instruction set control interfaces to outside, processes of cleaning evacuation, maintenance debug or analysis detection of various index to be detected in the environment analysis apparatus are carried out through selecting several bottom layer operation instructions collected at bottom layer operation instruction, the analysis flow control unit gives the bottom layer operation instruction step by step according to flow steps to the opened type sub analysis system, and then one or more opened type sub analysis systems can be controlled according to returned state result information for controlling a flow direction mode and operated.

A cache memory controller (100) connected to a main memory (10) having an instruction area storing a first program and a data area storing data used by a specific instruction included in the first program, and to an access master (1) for executing instructions included in the first program. The cache memory controller is provided with a cache memory (110) for storing a portion of the data in the main memory (10), and a data processing unit (140) that, prior to execution of the specific instruction by the access master (1), and in accordance with transfer scheduling information including the starting address of the specific instruction, calculates an access interval on a basis of the number of instruction steps remaining from the address of the instruction currently being executed by the access master (1) to the starting address of the specific instruction, and transfers data used by the specific instruction from the main memory (10) to the cache memory (110) at this access interval.

The invention discloses an intelligent television controlling method, device and system. The method comprises the steps that touch event data from a control device are received, wherein the touch event data comprise touch event type data and the coordinate data of more than two touch points; the touch event type data are read; and a corresponding control instruction is executed according to the touch event type data. The device comprises a data receiving module, a data reading module and an instruction executing module. The system comprises the control device and the intelligent television. The intelligent television receives the touch event data sent by an intelligent terminal and executes the control instruction corresponding to a touch event, so that multi-point touch of the intelligent terminal can control the intelligent television.

The invention provides a method containing four instructions and supporting fast Fourier transformation operation. A first combined instruction step and a second combined instruction step respectively comprise two instruction steps executed in sequence; and each instruction step comprises operand definition as well as operational relation and storage order of data in a register; in each combined instruction step, the operation result of a previous instruction step is used as a source operand of a posterior instruction step; the two-instruction combined step is executed once to complete primary butterfly operation of fast Fourier transformation, and then an output register of the primary butterfly operation is folded; and the same two-instruction combined step is used for conducting next-level butterfly operation till FFT operation ends. By using the four instruction steps which have operation and shifting functions simultaneously in combination, a shifting instruction of FFT can be omitted; and fast Fourier transformation operation can be completed under the condition that the efficiency of parts of floating point arithmetic can not be reduced, thereby reducing data correlation.

A method, system, and apparatus provide the ability to design a circuit. A behavior of the circuit is authored by dragging nodes from side panels and connecting them in an authoring canvas. Multiple circuit designs that satisfy the behavior are generated. A data grid table is generated and displays the circuit designs with each row representing a design, and the table is sortable based on columns that represent computed metrics. Upon selection of a design in the table, a computer generated circuit diagram is rendered. Interactive assembly instructions are generated and displayed. The interactive assembly instructions provide a text-based step-by-step guide to wire the circuit. Further, upon selection of an assembly instruction step, a corresponding element in the computer generated circuit diagram is highlighted.

The invention relates to a processor device with a timed interruption function. The processor device comprises an internal hierarchy, an intermediate hierarchy and a top hierarchy, wherein the internal hierarchy is a processor inner core, and comprises a special destination register, a decrypting and executing flow line used for processing an instruction step by step, and a bypass module and a flow line freeze module which are used for controlling the running of a flow line; the intermediate hierarchy comprises a processor core, and an external interface and a memory which are connected with the processor core respectively; an interruption module and a timer are also arranged in the processor core; the timer is connected with the interruption module and the special destination register respectively; the interruption module is connected with the processor inner core; the top hierarchy comprises a debugging interface, a bus line and a direct memory access module; the debugging interface is connected with the processor core; the direct memory access module is connected with the bus line and the memory respectively; the bus line is connected with the processor core. Compared with the prior art, the processor device with the timed interruption function has the advantages of high efficiency, quick response and the like.

The OSBS Subtractor Accelerator will enable the subtraction operation to simultaneously subtract all Bits of a data set, where: no ripple affect, no complement operations; therefore no multiple additions, no multiple moves, no temporary storage and no multiple instruction steps are required. In stand alone (pure) format the required time is six propagation delays to perform a subtraction operation. Beside the pure format a distributed or grouped format is available; which is dividing both input operands into groups. This grouped configuration also performs a parallel operation on the bits and on the groups in the same time. However, it needs nine propagation delays to execute a subtraction operation (including the first and second XOR gates); regardless it is a 16, 32 or 64 bit subtractor. It uses considerably less number of components than the pure configuration, and none of the integrated circuits have more than 5 input pins.