123results about How to "Reduce the number of terminals" patented technology

A switching power-supply apparatus and a switching power supply circuit in which a feedback signal is input from a feedback circuit to a feedback terminal of a switching control IC includes a capacitor and a Zener diode connected between the feedback terminal and a ground terminal. The Zener diode is a selectively connected external circuit. A voltage of the feedback terminal during an overcurrent operation changes depending on whether or not the external circuit is present. A return / latch determination circuit detects the voltage of the feedback terminal to switch between an automatic return system and a latch system in an overcurrent operation state.

A storage device, a board, a liquid container, a system and the like are disclosed, which are capable of efficiently detecting a connection to a host device without an increase in the number of existing terminals. A storage device 100 includes: a storage section 130; a storage controller 120 that controls access to the storage section 130; a controller 110 that performs a communication process with the host device; a data terminal SDA; a reset terminal XRST; and a clock terminal SCK. The controller 110 determines that an operational mode is a normal communication / connection detection mode when a voltage level change of the reset terminal XRST indicates a change in a reset / reset-disabled state during a time period for the clock terminal SCK has specific voltage level(s).

The present invention provides a microcomputer that makes it possible to implement a real-time trace on a mass-produced chip using few terminals, acquire trace information from within a specified range, and measure execution times, together with electronic equipment and a debugging system comprising this microcomputer.A trace information output section (16) outputs trace information for implementing a real-time trace, to four dedicated terminals. It outputs instruction execution status information (DST[2:0]) of the CPU to three terminals and the PC value (DPCO) of a branch destination when an PC absolute branch has occurred, serially to one terminal. A microcomputer (10) outputs information indicating the start and end of a trace range or execution-time measurement range to DST[2] in a predetermined sequence. A debugging tool (20) determines the start and end of the trace range or execution-time measurement range from the values in DST[2].

A high-frequency front end circuit (2) is provided with: a filter (21) provided with a first input / output terminal and a second input / output terminal, wherein the first input / output terminal is connected to an antenna common terminal (110), and a frequency of a passband is changed to that of a first passband or a second passband; a filter (22) provided with a third input / output terminal and a fourth input / output terminal, wherein the third input / output terminal is connected to the antenna common terminal (110), and the passband has a third passband the frequency of which does not overlap thatof the first passband or the second passband; and a switch (23) provided with a common terminal (23a) and selection terminals (23b) and (23c), wherein the common terminal (23a) is connected to the second input / output terminal, the selection terminal (23b) is connected to a transmission-side path, the selection terminal (23c) is connected to a reception-side path, and switching is exclusively performed between a connection between the common terminal (23a) and the selection terminal (23b) and a connection between the common terminal (23a) and the selection terminal (23c).

The present invention provides a microcomputer that makes it possible to implement a real-time trace on a mass-produced chip using few terminals, acquire trace information from within a specified range, and measure execution times, together with electronic equipment and a debugging system comprising this microcomputer. A trace information output section (16) outputs trace information for implementing a real-time trace, to four dedicated terminals. It outputs instruction execution status information (DST[2:0]) of the CPU to three terminals and the PC value (DPCO) of a branch destination when an PC absolute branch has occurred, serially to one terminal. A microcomputer (10) outputs information indicating the start and end of a trace range or execution-time measurement range to DST[2] in a predetermined sequence. A debugging tool (20) determines the start and end of the trace range or execution-time measurement range from the values in DST[2].

A switching power-supply apparatus and a switching power supply circuit in which a feedback signal is input from a feedback circuit to a feedback terminal of a switching control IC includes a capacitor and a Zener diode connected between the feedback terminal and a ground terminal. The Zener diode is a selectively connected external circuit. A voltage of the feedback terminal during an overcurrent operation changes depending on whether or not the external circuit is present. A return / latch determination circuit detects the voltage of the feedback terminal to switch between an automatic return system and a latch system in an overcurrent operation state.

The memory control device according to the present invention includes a command generating unit which divides the memory access request issued by the master into access commands each of which is for one of the memory devices, a command issuing units which issue each of the access commands to the memory devices, a data control unit which switches data between a master and memories, and the command generating unit switch between control for outputting an identical physical address to the memory units and control for outputting different physical addresses to the memory devices, depending on when the physical addresses of the memory devices are identical and when the physical addresses of the memory devices are different, each of the memory devices corresponds to one of the divided access commands.

The present invention relates to an electric power system, an electronic device and a charging method, which can reduce the number of connectors for connecting a tablet unit and a base unit. The tablet unit (120) includes a system device (161) and a connector (175) connected to a power line (177) for supplying power from the base unit (110). The base unit (110) includes a connector (275) configured to be connected to the connector (175) when the base unit is combined with the tablet unit; a battery unit (165) capable of supplying power to the system device (161) through the power line (177), and an external power-supply circuit capable of supplying power to the system device from an AC / DC adapter (252) through the power line. Since power can be supplied from the battery unit or the AC / DC adapter to the tablet unit through the power line alone, the number of connector terminals can be reduced.

A solid-state imaging device including a plurality of light receiving sections; a pixel area vertical transfer register section for transferring, column by column, charges generated by the plurality of light receiving sections; a dummy area vertical transfer register section for transferring, column by column in the vertical direction, the charges which have been transferred by the pixel area vertical transfer register section, the dummy area vertical transfer register section providing a control such that the transfer of the charges of at least one of the plurality of columns is performed in the same manner as the charges in the other columns in one case, and in a different manner from the transfer of the charges in the other columns in another case; and a horizontal transfer register section for transferring, in a horizontal direction, the charges which have been transferred from the dummy area vertical transfer register section.

A fuel injection valve has an injector body (4z) having formed in it high-pressure paths (6az, 6bz, 6cz) that allow high-pressure fuel to flow to a nozzle and receiving a piezo actuator (2z)(drive means) etc. for operating a needle (valve element) to open and close the nozzle; a fuel pressure sensor (50z) mounted on the body (4z) and detecting the pressure of the high-pressure fuel; a senor terminal (55z) for externally outputting the detected pressure value obtained from the fuel pressure sensor (50z); a drive terminal (56z) to which electric power for the piezo actuator (2z) is supplied; and a connector housing (70z) for holding the sensor terminal (55z) and the drive terminal (56z). The sensor terminal (55z), the drive terminal (56z), and the connector housing (70z) form a single connector.

A semiconductor integrated circuit device according to the present invention has a configuration where a GND line is shared by a first circuit block and a second circuit block from among a number of circuit blocks provided on a semiconductor substrate, where the first circuit block and the second circuit block are in a state where they do not operate parallel to each other. In addition, one bonding pad and the GND line are electrically connected to each other. Accordingly, one GND terminal is provided for two circuit blocks, and therefore, it is possible to reduce the number of lead terminals.

The invention reduces the pin terminal number of a controller that in parallel or simultaneously accesses a synchronous memory and an asynchronous memory. When a column address is latched to an SDRAM, immediately after that, access to FLASH is started, and a shared bus controller outputs the write / read address with respect to FLASH on the address bus. Then, after the end of data transfer on the data bus, either the shared bus controller outputs the write data, or FLASH can output the read data on the data bus by means of a strobe signal. Then, the input of address is established by FLASH, and, as the shared bus controller asserts a strobe signal, either FLASH fetches the write data on the data bus, or the shared bus controller fetches the read data on the data bus.