30results about How to "Reduce contact failure" patented technology

To provide a method for driving a semiconductor device, by which influence of variation in threshold voltage and mobility of transistors can be reduced. The semiconductor device includes an n-channel transistor, a switch for controlling electrical connection between a gate and a first terminal of the transistor, a capacitor electrically connected between the gate and a second terminal of the transistor, and a display element. The method has a first period for holding the sum of a voltage corresponding to the threshold voltage of the transistor and an image signal voltage in the capacitor; a second period for turning on the switch so that electric charge held in the capacitor in accordance with the sum of the image signal voltage and the threshold voltage is discharged through the transistor; and a third period for supplying a current to the display element through the transistor after the second period.

In sophisticated semiconductor devices including copper-based metallization systems, a substantially aluminum-free bump structure in device regions and a substantially aluminum-free wire bond structure in test regions may be formed on the basis of a manufacturing process resulting in identical final dielectric layer stacks in these device areas. Moreover, reliable wire bond connections may be obtained by providing a protection layer, such as an oxide layer, after exposing the respective contact metal, such as copper, nickel and the like, thereby providing highly uniform process conditions during the subsequent wire bonding process. The number of process steps may be reduced by making a decision as to whether a substrate is to become a product substrate or test substrate for estimating the reliability of actual semiconductor devices. For example, nickel contact elements may be formed above copper-based contact areas wherein the nickel may provide a base for wire bonding or forming a bump material thereon.

The semiconductor device includes a transistor and a capacitor element which is electrically connected to a gate of the transistor. Charge held in the capacitor element according to total voltage of voltage corresponding to the threshold voltage of the transistor and image signal voltage is once discharged through the transistor, so that variation in current flowing in the transistor or mobility of the transistor can be reduced.

Disclosed are a display device and a method of manufacturing the same. In the disclosed display device, a pad cover electrode disposed on a pad area comes into contact with an upper surface and a side surface of a pad electrode since a planarization layer is disposed on an active area excluding the pad area, which may prevent contact failure between the pad cover electrode and a conductive ball. In addition, in the display device, a first electrode, which is connected to a thin film transistor via a pixel connection electrode, is formed via the same mask process as the planarization layer so that it has a line width similar to that of the planarization layer and overlaps the planarization layer, which may simplify a structure and a manufacturing process.

The semiconductor device includes a transistor and a capacitor element which is electrically connected to a gate of the transistor. Charge held in the capacitor element according to total voltage of voltage corresponding to the threshold voltage of the transistor and image signal voltage is once discharged through the transistor, so that variation in current flowing in the transistor or mobility of the transistor can be reduced.

A driving method of a semiconductor device for compensating variation in threshold voltage and mobility of a transistor is provided. A driving method of a semiconductor device including a transistor and a capacitor electrically connected to a gate of the transistor includes a first period where voltage corresponding to threshold voltage of the transistor is held in the capacitor, a second period where a total voltage of video signal voltage and threshold voltage is held in the capacitor holding the threshold voltage, and a third period where charge held in the capacitor in accordance with the total voltage of the video signal voltage and the threshold voltage in the second period is discharged through the transistor.

To provide a method for driving a semiconductor device, by which influence of variation in threshold voltage and mobility of transistors can be reduced. The semiconductor device includes an n-channel transistor, a switch for controlling electrical connection between a gate and a first terminal of the transistor, a capacitor electrically connected between the gate and a second terminal of the transistor, and a display element. The method has a first period for holding the sum of a voltage corresponding to the threshold voltage of the transistor and an image signal voltage in the capacitor; a second period for turning on the switch so that electric charge held in the capacitor in accordance with the sum of the image signal voltage and the threshold voltage is discharged through the transistor; and a third period for supplying a current to the display element through the transistor after the second period.

A novel display device capable of excellent reflective display is provided. The display device includes a transistor including a gate electrode layer, a gate insulating layer over the gate electrode layer, a semiconductor layer over the gate insulating layer, and a source electrode layer and a drain electrode layer over the gate insulating layer and the semiconductor layer; a reflective electrode layer on the same plane as the source electrode layer and the drain electrode layer; a coloring layer overlapping with the reflective electrode layer; a pixel electrode layer overlapping with the coloring layer; and an anti-oxidation conductive layer connected to one of the source electrode layer and the drain electrode layer. The pixel electrode layer is connected to the transistor through the anti-oxidation conductive layer.

In a static memory cell, the failure rate upon forming contact elements connecting an active region with a gate electrode structure formed above an isolation region may be significantly reduced by incorporating an implantation species at a tip portion of the active region through a sidewall of the isolation trench prior to filling the same with an insulating material. The implantation species may represent a P-type dopant species and / or an inert species for significantly modifying the material characteristics at the tip portion of the active region.

A barrier layer and a copper film are successively formed on a silicon oxide film including a groove for wiring in the silicon oxide film and a silicon nitride film, both formed on a semiconductor substrate. Thereafter, the barrier layer and the copper film are removed from outside of the groove for wiring, thereby forming a wiring. Tungsten is selectively or preferentially grown on the wiring to selectively form a tungsten film on the wiring. After the formation of the copper film, a treatment with hydrogen may be performed. After the formation of the wiring, the semiconductor substrate may be cleaned with a cleaning solution capable of removing a foreign matter or a contaminant metal. After the formation of the wiring, a treatment with hydrogen is carried out.

A method for fabricating a semiconductor device includes: providing a substrate structure in which a plurality of gate lines are already formed; forming a capping layer over the substrate structure; oxidizing the capping layer; and forming an insulation layer over the oxidized capping layer. The capping layer may include a nitride-based material. The insulation layer may include substantially the same material as the capping layer. The oxidizing of the capping layer may comprise performing a radical oxidation process.

To provide a method for driving a semiconductor device, by which influence of variation in threshold voltage and mobility of transistors can be reduced. The semiconductor device includes an n-channel transistor, a switch for controlling electrical connection between a gate and a first terminal of the transistor, a capacitor electrically connected between the gate and a second terminal of the transistor, and a display element. The method has a first period for holding the sum of a voltage corresponding to the threshold voltage of the transistor and an image signal voltage in the capacitor; a second period for turning on the switch so that electric charge held in the capacitor in accordance with the sum of the image signal voltage and the threshold voltage is discharged through the transistor; and a third period for supplying a current to the display element through the transistor after the second period.

In a static memory cell, the failure rate upon forming contact elements connecting an active region with a gate electrode structure formed above an isolation region may be significantly reduced by incorporating an implantation species at a tip portion of the active region through a sidewall of the isolation trench prior to filling the same with an insulating material. The implantation species may represent a P-type dopant species and / or an inert species for significantly modifying the material characteristics at the tip portion of the active region.

A cartridge includes a substrate and an engagement portion. The first surface faces a first direction and has a first surface on which an electrical terminal is disposed. The engagement portion includes a second surface disposed upstream from the substrate in the first direction and a third surface. The second surface faces a second direction, which forms an obtuse angle with the first direction. The third surface faces a third direction, which forms an acute angle with the first direction. The third surface does not overlap with the substrate in the first direction and the third surface is disposed downstream from the second surface in the first direction.

Disclosed are a display device and a method of manufacturing the same. In the disclosed display device, a pad cover electrode disposed on a pad area comes into contact with an upper surface and a side surface of a pad electrode since a planarization layer is disposed on an active area excluding the pad area, which may prevent contact failure between the pad cover electrode and a conductive ball. In addition, in the display device, a first electrode, which is connected to a thin film transistor via a pixel connection electrode, is formed via the same mask process as the planarization layer so that it has a line width similar to that of the planarization layer and overlaps the planarization layer, which may simplify a structure and a manufacturing process.

The present invention discloses a test pin module. The test pin module comprises at least two sets of test pins arranged side by side, the test pin module comprises a first test pin main body (1) anda second test pin main body (2) arranged at the upper portion of the first test pin main body (1); the first test pin main body (1) is provided with a first test pin head (3), the second test pin mainbody (2) is provided with a second test pin head (4) located at the right side of the first test pin head (3), and the first test pin main body (1) and the second test pin main body (2) are providedwith test board contact surfaces (5). The test pin module and the test contact formed by test pin modules are simple in structure and low in cost, the two test pin heads of the test pin sets are in contact with the product pins for test, the test pin module at least comprises two sets of the test pins arranged side by side, at least four test pin heads are in contact with the product pins when test so as to greatly reduce the problem of the failed contact of the test pin module and the product pins so as to improve the accuracy of the product test result and improve the product percent of pass, and therefore, the test pin module and the test contact formed by test pin modules are suitable for promotion and usage.

A method for fabricating a semiconductor device includes: providing a substrate structure in which a plurality of gate lines are already formed; forming a capping layer over the substrate structure; oxidizing the capping layer; and forming an insulation layer over the oxidized capping layer. The capping layer may include a nitride-based material. The insulation layer may include substantially the same material as the capping layer. The oxidizing of the capping layer may comprise performing a radical oxidation process.

A display panel includes: a display substrate including a display area and a pad area spaced apart from a side of the display area in a first direction; and first to (n)th signal pads (where n is an integer of 2 or more) in the pad area on the display substrate, extending in the first direction, and spaced apart from each other in a second direction perpendicular to the first direction, wherein a (k)th signal pad among the first to (n)th signal pads (where k is an integer between 1 and n) is between the first signal pad and the (n)th signal pad, wherein a length of each of (k)th to (n)th signal pads among the first to (n)th signal pads along the first direction gradually increases, and wherein a width of each of the (k)th to (n)th signal pads along the second direction gradually decreases.

In a semiconductor device and a method of manufacturing the same, a conductive structure is formed on an active region defined by a device isolation layer on a semiconductor substrate. The conductive structure includes a gate pattern and source / drain regions adjacent to the gate pattern. A first semiconductor layer is formed on the active region by a selective epitaxial growth (SEG) process. An amorphous layer is formed on the first semiconductor layer. A second semiconductor layer is formed from a portion of the amorphous layer by a solid-phase epitaxy (SPE) process. Elevated structures are formed on the source / drain regions by removing a remaining portion of the amorphous layer from the substrate so the elevated structure includes the first semiconductor layer and the second semiconductor layer stacked on the first semiconductor layer. The device isolation layer may be prevented from being covered with the elevated structures, to thereby prevent contact failures.

A novel display device capable of excellent reflective display is provided. The display device includes a transistor including a gate electrode layer, a gate insulating layer over the gate electrode layer, a semiconductor layer over the gate insulating layer, and a source electrode layer and a drain electrode layer over the gate insulating layer and the semiconductor layer; a reflective electrode layer on the same plane as the source electrode layer and the drain electrode layer; a coloring layer overlapping with the reflective electrode layer; a pixel electrode layer overlapping with the coloring layer; and an anti-oxidation conductive layer connected to one of the source electrode layer and the drain electrode layer. The pixel electrode layer is connected to the transistor through the anti-oxidation conductive layer.

In order to be able to arrange a master module (M), slave modules (S) and conventional plug modules (K) in a freely configurable manner in a modular plug system, according to the invention, a modularframe (22) is provided with a circuit board (1) which includes at least one continuous conductor path and preferably more than one connection pad.

The invention discloses a preparation method of a sulfur composite positive electrode material and an all-solid-state lithium-sulfur battery. The method comprises the following steps of ball-milling and mixing conductive carbon and sulfide solid electrolyte, and sieving to obtain uniformly mixed conductor powder, and placing elemental sulfur in a high-temperature area of a vacuum tube furnace, placing the mixed conductor powder in a low-temperature area of the vacuum tube furnace, uniformly depositing sulfur vapor in the turned mixed powder, and cooling to room temperature to obtain the sulfurcomposite positive electrode material. The sulfur composite positive electrode material prepared by the method is small in sulfur particle size and large in specific surface area, and is in uniform and close contact with mixed powder, and the obtained all-solid-state lithium-sulfur battery is small in overall impedance, high in active substance utilization rate, low in capacity loss and stable incycle performance.

The invention discloses a method for preparing a sulfur composite cathode material and an all-solid-state lithium-sulfur battery, wherein the method includes: mixing conductive carbon and a sulfide solid electrolyte by ball milling, and obtaining uniformly mixed conductor powder after sieving; In the high temperature zone of the vacuum tube furnace, the mixed conductor powder is placed in the low temperature zone of the vacuum tube furnace, and the sulfur vapor is evenly deposited in the churning mixed powder, and after cooling to normal temperature, the sulfur composite cathode material is obtained. The sulfur composite cathode material prepared by the present invention has a small particle size and a large specific surface area, and is in uniform and close contact with the mixed powder. The obtained all-solid-state lithium-sulfur battery has a small overall impedance, a high utilization rate of active materials, less capacity loss, and stable cycle performance. .

A test piece is characterized by comprising a guide body (1), a test piece head (2) arranged above the guide body (1), an arc-shaped elastic area, an installation support and a test plate contact surface. The guide body (1) is provided with the arc-shaped elastic area (3), the arc-shaped elastic area (3) is provided with the installation support (4), and the installation support (4) is provided with the test board contact surface (5). The test piece is simple in structure, the cost is low, when the test piece is in contact with a pin of a product, the testing contact surface on the head of thetest piece is in contact with the pin due to continuous elastic force generated by the arc-shaped elastic area of the test piece, so that the problem of contact failure of the test piece and the pinof the product is greatly reduced, the accuracy of a product test result is improved, the product percent of pass is improved, and the test piece is suitable for popularization and application.

The invention relates to the technical field of high-voltage power distribution cabinets, and discloses a high-voltage power distribution cabinet for new energy vehicles, which includes a power distribution cabinet. The power distribution cabinet includes a cabinet body. The inner wall is fixedly connected with a dust-proof net, the front side of the cabinet body is connected with a cabinet body door through hinge rotation, the right end of the front side side of the cabinet body door is fixedly connected with a handle, and the front and rear ends of the right side of the cabinet body are provided with T-shaped chutes. The inner wall of the T-shaped chute of the cabinet is slidably connected with a T-shaped clamping rod, the right side of the T-shaped clamping rod is fixedly connected with the right cover plate, and the inner rear end of the cabinet is provided with a wire fixing device, which solves the problem of existing The electric cabinet does not have a special device for combing the wires, which makes the wires inside the distribution cabinet scattered and piled up easily to accumulate heat, and the surface of the wires will accumulate thick dust after long-term use, which is not easy to distinguish, making maintenance personnel When the electric cabinet is repaired, it is troublesome to find the wires.

The invention discloses a transportation automobile intelligent electric apparatus box. An LINE circuit comprises integrated circuits U53-U55, diodes D51-D52, resistors R191-R198, a resistor R52, resistors R11-R12, resistors R37-R38, resistors R58-R59 and capacitors C202-C208. Centralized control is adopted, small modules are canceled, wiring harnesses of the transportation automobile intelligentelectric apparatus box are reduced, the total weight of the wiring harnesses is reduced, all the small modules are integrated to achieve centralized control, module cost, wiring harness connection andconnectors between the wiring harnesses and the modules are reduced, cost is reduced, contact faults between the modules are reduced, the mode that weak current controls strong current is adopted, the diameter of each wiring harness is reduced, the weight of the wiring harnesses is further reduced, maintenance is more convenient and quicker, high and low levels can be effectively input or input at the analog quantity through an input port, and configuration is flexible. By the adoption of the scheme, the requirements for connection and control of various automobile electric apparatuses can bemet, and circuits are simple, convenient to use, centralized and convenient to install and overhaul.

In a semiconductor device and a method of manufacturing the same, a conductive structure is formed on an active region defined by a device isolation layer on a semiconductor substrate. The conductive structure includes a gate pattern and source / drain regions adjacent to the gate pattern. A first semiconductor layer is formed on the active region by a selective epitaxial growth (SEG) process. An amorphous layer is formed on the first semiconductor layer. A second semiconductor layer is formed from a portion of the amorphous layer by a solid-phase epitaxy (SPE) process. Elevated structures are formed on the source / drain regions by removing a remaining portion of the amorphous layer from the substrate, so the elevated structure includes the first semiconductor layer and the second semiconductor layer stacked on the first semiconductor layer. The device isolation layer may be prevented from being covered with the elevated structures, to thereby prevent contact failures.