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78results about How to "Avoid excessive width" patented technology

Integrated circuit device, and method of fabricating same

There are many inventions described and illustrated herein. In a first aspect, the present invention is directed to integrated circuit device including SOI logic transistors and SOI memory transistors, and method for fabricating such a device. In one embodiment, integrated circuit device includes memory portion having, for example, PD or FD SOI memory cells, and logic portion having, for example, high performance transistors, such as Fin-FET, multiple gate transistors, and / or non-high performance transistors (such as single gate transistors that do not possess the performance characteristics of the high performance transistors).
Owner:MICRON TECH INC

Technique for forming a strained transistor by a late amorphization and disposable spacers

By using a disposable spacer approach for forming drain and source regions prior to an amorphization process for re-crystallizing a semiconductor region in the presence of a stressed spacer layer, possibly in combination with enhanced anneal techniques, such as laser and flash anneal processes, a more efficient strain-generating mechanism may be provided. Furthermore, the spacer for forming the metal silicide may be provided with reduced width, thereby positioning the respective metal silicide regions more closely to the channel region. Consequently, an overall enhanced performance may be obtained on the basis of the above-described techniques.
Owner:GLOBALFOUNDRIES US INC

IGBT or like semiconductor device of high voltage-withstanding capability

A multiple-cell insulated-gate-bipolar-transistor chip is disclosed which includes a semiconductor substrate having formed therein a p+-type collector region and an n−-type base region, with a pn junction therebetween. An annular trench is etched in the substrate so as to surround the array of IGBT cells. Received in the trench are a dielectric layer which is held against the base region, and an electroconductive layer which is held against the base region via the dielectric layer and which is electrically coupled to the collector region. When the pn junction between the collector and base regions is reverse biased, the electroconductive layer creates at the annular periphery of the base region a depletion layer which is joined to a depletion layer created in the base region by the pn junction, thereby preventing current leakage from the side surfaces of the IGBT chip.
Owner:SANKEN ELECTRIC CO LTD

Automotive tandem alternator having reduced axial length and capable of effectively suppressing magnetic leakage

According to the invention, a tandem alternator includes a rotary shaft, a first and a second field arranged in tandem on the rotary shaft, and a first and a second armature arranged in tandem in the axial direction of the rotary shaft. The first armature is provided on an outer periphery of the first field to constitute a first power generation unit. The second armature is provided on an outer periphery of the second field to constitute a second power generation unit. The first and second fields are arranged to abut each other in the axial direction of the rotary shaft, so as to minimize the axial length of the alternator. The first and second fields are configured to respectively create a first and a second magnetomotive force whose directions are opposite to each other, so as to minimize magnetic leakage between the first and second power generation units.
Owner:DENSO CORP
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