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299 results about "Instruction selection" patented technology

In computer science, instruction selection is the stage of a compiler backend that transforms its middle-level intermediate representation (IR) into a low-level IR where each operation directly corresponds to an instruction available on the target machine. In a typical compiler, instruction selection precedes both instruction scheduling and register allocation; hence its output IR has an infinite set of pseudo-registers (often known as temporaries) and may still be – and typically is – subject to peephole optimization. Otherwise, it closely resembles the target machine code, bytecode, or assembly language.

Image processing apparatus, image processing method, and storage medium

A user photographs an image including an object to be extracted, uses an instruction selection unit or the like to designate an extraction range, and an object extraction circuit performs extraction. The image data of an extracted object area is compressed / encoded, and stored together with photographing conditions into a storage unit. Subsequently, a background image is photographed or inputted. While the background image is displayed, the previously extracted object image is read from the storage unit. To suppress a difference in gradation and hue between the background image and the object image, the gradation and hue of the object image are adjusted, mixing and smoothing with the background image are performed in the vicinity of an object outline, and the object image is overwritten, synthesized, and displayed on the background image. The position and size of the object image are adjusted according to a user's instruction. Synthesized image data is recorded in a recording medium.
Owner:CANON KK

Instruction selection in a multi-platform environment

Systems and methods for building a platform specific compiler having an embedded instruction selector in a multi-platform environment are provided. A set of user defined platform dependent compiler architecture descriptors that describe corresponding architectural features and a set of instruction predicates defining those instructions to be selected are converted to platform dependent compiler object code and instruction selector object code, respectively. The platform specific compiler having the embedded instruction selector is formed from the platform dependent compiler object code, the instruction selector object code, and the platform independent compiler object code.
Owner:ORACLE INT CORP

Mobile terminal and method for connecting wireless network based on mobile terminal

The invention discloses a mobile terminal and a method for connecting a wireless network based on the mobile terminal. The method includes the steps: presetting three network connection modes including a signal strength mode, a designated operator mode and a geographical position mode in the mobile terminal; receiving a user command and selecting one mode as the current network connection mode of the mobile terminal according to the command; automatically acquiring a currently available wifi (wireless fidelity) list by the mobile terminal; analyzing the currently available wifi list and screening a wifi network as the best network; and automatically connecting the mobile terminal to the best network. By the aid of the mobile terminal, the best network can be automatically recognized from currently available wireless networks and can be automatically connected, the operating steps of searching, selecting and connecting the wireless network are decreased for a user, convenience is brought for the user, flow waste caused by forgetting of switching to the free wireless network is effectively avoided, and expenses are saved for the user.
Owner:HUIZHOU TCL MOBILE COMM CO LTD

Multiple sidebar module open states

Typical sidebars comprise a plurality of application modules stacked in a vertical column. Thus, each application module has a limited amount of space to display useful information to the user. In one embodiment, the application module of a sidebar can exist in one of a plurality of display states comprising, a closed state, which displays a title and a button to change states, a full open state, which displays a complete list of information associated with the application module and a preferred open state, which displays a subset of the information associated with the application module. The subset of information is selected based on instruction that can be predefined by a sidebar user and / or a sidebar provider.
Owner:OATH INC

Instruction scheduling method, instruction scheduling device, and instruction scheduling program

A dependency analysis unit creates a dependency graph showing dependencies between instructions acquired from an assembler code generation unit. A precedence constraint rank calculation unit assigns predetermined weights to arcs in the graph, and adds up weights to calculate a precedence constraint rank of each instruction. When a predecessor and a successor having a dependency and an equal precedence constraint rank cannot be processed in parallel due to a resource constraint, a resource constraint evaluation unit raises the precedence constraint rank of the predecessor. A priority calculation unit sets the raised precedence constraint rank as a priority of the predecessor. An instruction selection unit selects an instruction having a highest priority. An execution timing decision unit places the selected instruction in a clock cycle. The selection by the instruction selection unit and the placement by the execution timing decision unit are repeated until all instructions are placed in clock cycles.
Owner:PANASONIC CORP

Piano learning system for tablet and touchscreen devices

A piano learning system for a touchscreen enabled device is disclosed. The system includes a housing configured and arranged to support a touchscreen enabled device. A keyboard on the housing has a plurality of selectably lightable keys. A communication interface is configured and arranged to connect to the touchscreen enabled device. A microprocessor is electrically connected to the keyboard and communication interface. The microprocessor is configured and arranged to read the state of the lightable keys and transmit the state through the communication interface and is further configured and arranged to selectively light the lightable keys of the keyboard in response to instructions received through the communication interface.
Owner:INMUSIC BRANDS

Providing advertising content to at least one communicating terminal

An apparatus for providing advertising content to terminals communicating over a communications network is provided. The apparatus includes a processing element that communicates with network elements residing on the network or other networks to receive information regarding the terminals and their users. At least one of the terminals may be a mobile terminal. The processing element communicates an instruction to an advertising platform based on this information, and the advertising platform in turn selects and transmits advertising content to the respective terminals according to the instruction. Such content may include text messages, voice messages, picture messages, video clips, and more. In some cases, the processing element may determine a common characteristic of two or more terminals and their users based on the information received, and advertising content based on that common characteristic may be sent to the terminals. A method, system, and computer program product are also provided.
Owner:RPX CORP

Instruction unit with instruction buffer pipeline bypass

A circuit arrangement and method selectively bypass an instruction buffer for selected instructions so that bypassed instructions can be dispatched without having to first pass through the instruction buffer. Thus, for example, in the case that an instruction buffer is partially or completely flushed as a result of an instruction redirect (e.g., due to a branch mispredict), instructions can be forwarded to subsequent stages in an instruction unit and / or to one or more execution units without the latency associated with passing through the instruction buffer.
Owner:IBM CORP

Software distribution deployment method and system

The invention relates to the technical field of computers and discloses a software distribution deployment method and system. The method comprises the following steps: receiving an operation command of a file uploading person by virtue of a file uploading client so as to select an installation file to be uploaded, and uploading the installation file and the installation parameter information of the installation file to a strategic control server; checking whether the uploaded installation file is legal; starting the distribution service script program of a file distribution server according to the installation parameter information if the file is legal, and transmitting the corresponding installation file to each appointed target equipment; and executing corresponding installation commands in installation parameters, starting installation program and returning the installation result to the file uploading client. The software distribution deployment method can be used for realizing batch software installation of computers with different operation systems so as to greatly improve the installation efficiency and the installation flexibility. The installation process is a transparent script, and the installation file can be check, thereby improving the security and providing a certain security assurance.
Owner:SHENZHEN XBROTHER TECH

Method and apparatus for spatial register partitioning with a multi-bit cell register file

There is provided a multi-bit storage cell for a register file. The storage cell includes a first set of storage elements for a vector slice. Each storage element respectively corresponds to a particular one of a plurality of thread sets for the vector slice. The storage cell includes a second set of storage elements for a scalar slice. Each storage element in the second set respectively corresponds to a particular one of at least one thread set for the scalar slice. The storage cell includes at least one selection circuit for selecting, for an instruction issued by a thread, a particular one of the storage elements from any of the first set and the second set based upon the instruction being a vector instruction or a scalar instruction and based upon a corresponding set from among the pluralities of thread sets to which the thread belongs.
Owner:IBM CORP

Method and system for controlling a plurality of air conditioners, remote controls and air conditioners

The invention discloses a method and a system for controlling a plurality of air conditioners, remote controls and the air conditioners. The method for controlling the plurality of air conditioners includes that the remote controls receive first instructions input by a user, sequentially transmit matched requests to the air conditioners according to the first instructions to be matched with the air conditioners respectively, store recognition codes of the remote controls finishing the matching process, receive second instructions input by the user, select the air conditioners corresponding to the recognition codes according to the second instructions to serve as controlled objects and transmit control instructions to the controlled objects to control the controlled objects. The method and the system, the remote controls and the air conditioners solve the problems in the prior art of complex control steps and low efficiency due to the fact that one remote control controls the plurality of air conditioners, and further achieve the effects of simplifying the control steps and improving control efficiency of the air conditioners by the remote controls.
Owner:GREE ELECTRIC APPLIANCES INC

Method for configuring a graphical user interface

In order to configure a graphical user interface (6′) for displays of various terminals, a graphical configuration interface (81′) is presented, which comprises a miniaturized presentation of a desktop for the graphical user interface (6′). Configuration instructions are received in order to select widgets (W′) and in order to arrange the widgets (W′) on the desktop by positioning miniaturized presentations of the widgets on the desktop presented in miniature. Further configuration instructions selectively associate one or more defined parts of the desktop with the terminals, and the graphical user interface (6′) is defined for a particular terminal on the basis of the associated parts of the desktop and the widgets (W′) arranged thereon.
Owner:FERAG AG

Executable radio software system and method

An executable radio software system including a core framework layer responsive to one or more applications and a middleware layer. The core framework layer includes isolated platform dependent code in one or more files for a number of different platforms each selectively compilable by a directive to reduce the dependency of the core framework layer on a specific platform. Also, the core framework layer includes an embedded distributed parser responsive to the Domain profiles of the applications for more efficiently installing and running an application.
Owner:RAYTHEON CO

Program parallelization apparatus, program parallelization method, and program parallelization program

A program parallelization apparatus which generates a parallelized program of shorter parallel execution time is provided. The program parallelization apparatus inputs a sequential processing intermediate program and outputs a parallelized intermediate program. In the apparatus, a thread start time limitation analysis part analyzes an instruction-allocatable time based on a limitation on an instruction execution start time of each thread. A thread end time limitation analysis part analyzes an instruction-allocatable time based on a limitation on an instruction execution end time of each thread. An occupancy status analysis part analyzes a time not occupied by already-scheduled instructions. A dependence delay analysis part analyzes an instruction-allocatable time based on a delay resulting from dependence between instructions. A schedule candidate instruction select part selects a next instruction to schedule. An instruction arrangement part allocates a processor and time to execute to an instruction.
Owner:NEC CORP

Using intra-document indices to improve xquery processing over XML streams

A system and method for parsing documents in query processing comprises producing at least one index of a document written in a mark-up language, corresponding the index to the document, scanning the document, and selectively skipping portions of the document based on instructions from the index. Furthermore, the mark-up language comprises any of HTML and XML; the skipped portions of the document comprise portions irrelevant to the query; the index comprises a plurality of elements representing textual categories of the query; and the instructions match the elements to the query. If the elements do not match the query, then the parser uses the index to skip the portions of the document corresponding to the unmatched elements. Moreover, each of the elements corresponds to a position in the document, wherein the position comprises an end position, which determines where to resume scanning the document upon skipping the portions of the document.
Owner:IBM CORP

Navigating A Plurality Of Instantiated Virtual Desktops

Navigating a plurality of instantiated virtual desktops including maintaining a z-axis order of a plurality of currently instantiated virtual desktops; receiving a user's invocation of one or more mouse buttons; identifying the received invocation of the one or more mouse buttons as a user instruction to change the virtual desktop currently given focus; selecting, in dependence upon the user instruction, one of the plurality of virtual desktops to give focus; reordering the virtual desktops in the z-axis such that the selected virtual desktop is highest in the z-axis order; giving focus to the selected virtual desktop; and displaying the selected virtual desktop as highest in the z-axis order.
Owner:IBM CORP

Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor

A pipelined data processing unit includes an instruction sequencer and n functional units capable of executing n operations in parallel. The instruction sequencer includes a random access memory for storing very-long-instruction-words (VLIWs) used in operations involving the execution of two or more functional units in parallel. Each VLIW comprises a plurality of short-instruction-words (SIWs) where each SIW corresponds to a unique type of instruction associated with a unique functional unit. VLIWs are composed in the VLIW memory by loading and concatenating SIWs in each address, or entry. VLIWs are executed via the execute-VLIW (XV) instruction. The iVLIWs can be compressed at a VLIW memory address by use of a mask field contained within the XV1 instruction which specifies which functional units are enabled, or disabled, during the execution of the VLIW. The mask can be changed each time the XV1 instruction is executed, effectively modifying the VLIW every time it is executed. The VLIW memory (VIM) can be further partitioned into separate memories each associated with a function decode-and-execute unit. With a second execute VLIW instruction XV2, each functional unit's VIM can be independently addressed thereby removing duplicate SIWs within the functional unit's VIM. This provides a further optimization of the VLIW storage thereby allowing the use of smaller VLIW memories in cost sensitive applications.
Owner:ALTERA CORP

Selective flushing of instructions in an instruction pipeline in a processor back to an execution-resolved target address, in response to a precise interrupt

Selective flushing of instructions in an instruction pipeline in a processor back to an execution-determined target address in response to a precise interrupt is disclosed. A selective instruction pipeline flush controller determines if a precise interrupt has occurred for an executed instruction in the instruction pipeline. The selective instruction pipeline flush controller determines if an instruction at the correct resolved target address of the instruction that caused the precise interrupt is contained in the instruction pipeline. If so, the selective instruction pipeline flush controller can selectively flush instructions back to the instruction in the pipeline that contains the correct resolved target address to reduce the amount of new instruction fetching. In this manner, as an example, the performance penalty of precise interrupts can be lessened through less instruction refetching and reduced delay in instruction pipeline refilling when the instruction containing the correct target address is already contained in the pipeline.
Owner:QUALCOMM INC

Imaging apparatus with selective allocation of first and second image data based on operation instruction

An imaging apparatus for recording image data picked up by an image pickup unit until a recording medium is presented. In response to an instruction from an instruction operation unit capable of arbitrary instruction, a first image data picked up by the image pickup unit is allocated to the same group as a second image data photographed immediately before the first image data so as to allocate the first image data to the same group as the image data picked up immediately before the first image data. In addition, management information containing group information that shows image data within the group is generated.
Owner:CANON KK

Upper limb rehabilitation robot control system

The invention relates to an upper limb rehabilitation robot control system. An upper computer transmits instructions to an MCU (micro-programmed control unit) module through a Bluetooth / WIFI, the MCUmodule selects different training modes according to the instructions, a voice module identifies unspecific voice, voice signals are acquired and processed and transmitted to the MCU module by the aidof an SPI (serial peripheral interface) communication protocol, a driving module drives a motor to rotate in a controlled manner, so that training actions are completed, electromyography collection of a healthy side of a patient is implemented by an electromyography control module, electromyography signals are extracted, processed and analyzed, actions of the healthy side of the patient map a mechanical arm, movement intentions are identified, and functional compensation and control is achieved. By the aid of various man-machine interaction modes, targeted rehabilitation training effects canbe effectively achieved, joints of the upper limb of the patient can be accurately positioned when the system is used, and tissue damage and pulled muscle caused by misplaced training are avoided. Thecontrol system is small in size, convenient to use, good in training effect and low in manufacturing cost.
Owner:UNIV OF SHANGHAI FOR SCI & TECH

Data generator system and method

A method for generating data is provided. The method includes providing a first file having at least one format definition including a plurality of field identifiers and a data value associated with at least one the field identifiers, the first file maintaining an identifier of at least a second file. The method includes selectively managing the second file based on an instruction, and generating to the second file a data string according to the format definition, the data string including the data value of the at least one field identifier. A system and method for generating data for test applications is also provided.
Owner:SPRINT CORPORATION

System and method for multi-core synchronous debugging of a multi-core platform

A system and a corresponding method for multi-core synchronous debugging of a multi-core platform including a plurality of cores are provided. The method includes the following steps. Transmit a core debugging instruction to one of the cores selected by a system debugging instruction or store a group setting included in the system debugging instruction according to the type of the system debugging instruction. Control every core in a group to start executing program instructions simultaneously according to another system debugging instruction. The group is a subset of the cores and the group setting indicates which ones of the cores are included in the group. Use a handshaking mechanism to control all cores of the group to enter a debug mode simultaneously when a debug event happens in any core of the group.
Owner:IND TECH RES INST

Transaction fee surfacing system

Systems and methods for providing a transaction fee surfacing system include a system provider device that retrieves, through communication over a network with a merchant device that is located at a merchant physical location, a product identifier for a product and determines a customer device associated with the product. The system provider also retrieves incentives associated with the product from a database located in a non-transitory memory. Additionally, the system provider device determines at least one customer payment account associated with the customer device and retrieves information associated with at least one customer payment account from the database. The system provider thus provides incentives for a particular purchase instruction associated with purchasing the product using the at least one customer payment account. The system provider then provides the incentives for display on a customer device and receives a purchase instruction selection.
Owner:PAYPAL INC

Method for generating document components and managing same

Method, system, and program product for analyzing a generation program for generating document information consisting of a plurality of document components. The the generation program contains commands for generating the document components, contained in the document information. The information processing system includes: a correspondence information generator for executing the generation program and generating correspondence information which indicates correspondence between the plurality of generating commands and document components generated by the generating commands; a selector for selecting any of the plurality of document components at the instruction of a user; and a command information output unit for selecting, based on the correspondence information, the generating command which has generated the document component selected by the selector and outputting information for identifying the generating command.
Owner:IBM CORP

Processor with a Coprocessor having Early Access to Not-Yet Issued Instructions

Apparatus and methods provide early access of instructions. A fetch queue is coupled to an instruction cache and configured to store a mix of processor instructions for a first processor and coprocessor instructions for a second processor. A coprocessor instruction selector is coupled to the fetch queue and configured to copy coprocessor instructions from the fetch queue. A queue is coupled to the coprocessor instruction selector and from which coprocessor instructions are accessed for execution before the coprocessor instruction is issued to the first processor. Execution of the copied coprocessor instruction is started in the coprocessor before the coprocessor instruction is issued to a processor. The execution of the copied coprocessor instruction is completed based on information received from the processor after the coprocessor instruction has been issued to the processor.
Owner:QUALCOMM INC

Mobile terminal user privacy protection method and system

In a method for protecting private information stored in a mobile device, a first instruction is received to activate a private protection function of the mobile device. A second instruction is received to select a private information stored in the mobile device. The mobile device is connected to a pair of glasses and the selected private information is transmitted to the pair of glasses. The selected private information is displayed on a visual screen of the pair of glasses, and not displayed on a screen of the mobile device.
Owner:HONG FU JIN PRECISION IND WUHAN CO LTD +1

Multi-destination route planning method and system

The invention provides a multi-destination route planning method, comprising the steps of: S1, a terminal generating route planning request information according to input place information of a departure place and multiple destinations, and sending the route planning request information to a background server; S2, the server planning at least one route according to the route planning request information received from the terminal, and sending the planned route to the terminal; and S3, the terminal displaying the planned route on an electronic map, and selecting the planned route for displaying according to the received operating instruction. By implementing the multi-destination route planning method and system, a user can add multiple destinations at one time, and then the overall route appearing currently is acquired at one time, so that detour caused when the user subjectively cuts the route is avoided, the query operation quantity of the user is reduced, and the user experience is improved.
Owner:SHENZHEN SEG SCI NAVIGATIONS CO LTD

Intelligent ordering system

The invention provides an intelligent ordering system which comprises a dish selection module for selecting corresponding dish information according to an instruction of a user, a scheduling module for sequencing the received dish information, and sending the dish information in sequence according to a sequenced result, a disk state processing module for updating states of dishes, and a display module for displaying the states of the dishes. According to the intelligent ordering system, the scheduling module is used for sequencing the dish information, so that the preparation flow of the dishes is optimized, and the efficiency is greatly improved; furthermore, the service steps of a worker are reduced, and the cost is reduced.
Owner:PHICOMM (SHANGHAI) CO LTD
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