40 results about "Fault mitigation" patented technology

An electrical fault mitigation system includes a mitigation device including a containment chamber defining a cavity, a first electrode positioned within the cavity and coupled to a first conductor, and a second electrode positioned within the cavity and coupled to a second conductor. The mitigation device also includes a first voltage source, and a plasma gun positioned within the cavity and configured to emit ablative plasma using the first voltage source to discharge energy from an electrical fault. The system also includes a first voltage limiter device configured to limit a voltage of the first conductor from increasing above a predetermined threshold to prevent a second voltage source from generating a second electrical arc between the first electrode and the second electrode when the second voltage source applies a voltage across the first electrode and the second electrode.

According to one embodiment, described herein is an apparatus for mitigating on-board diagnostic (OBD) faults generated by an OBD system of an internal combustion engine (ICE) system (10) having a selective catalytic reduction system (230) with a diesel exhaust fluid (DEF) decomposition tube (239). The apparatus includes a fault mitigation module (320) that is configured to monitor at least one OBD signal of the OBD system and issue a request (325) for regenerating the DEF decomposition tube when a value of the at least one OBD signal reaches a predetermined regeneration threshold corresponding with the at least one OBD signal. The regeneration threshold is reachable prior to an OBD fault threshold corresponding with the at least one OBD signal. The apparatus also includes a regeneration module (340) that is configured to regenerate the DEF decomposition tube according to the issued request.

A respiratory apparatus includes components to protect operations of the apparatus. For example, in some versions, the apparatus may include a power supply, a motor powered by the power supply, and a transient absorption diode circuit between the motor and the power supply. The transient absorption diode circuit may be configured to absorb energy generated by the motor from rotational kinetic energy. Such absorption may serve to protect the components of the apparatus. In some examples, the apparatus may include a fault mitigation integrated circuit (IC). The IC circuit may be included in the respiratory apparatus to detect one or more faults based on physical and system parameters of the apparatus. The fault mitigation integrated circuit may generate a signal to stop the motor based on the detected fault, and may digitally communicate with a processor information about the detected fault.

Technical solutions are described for current sensor fault mitigation for systems with permanent magnet DC drives. An example power steering system includes a brush motor, and a motor control system that generates an amount of torque using the brush motor, the amount of torque corresponding to a torque command. The motor control system includes a current sensor fault detector that detects a current sensor fault associated with a current sensor used to measure a current across the brush motor. The motor control system further includes a velocity observer that computes an estimated motor velocity in response to the current sensor fault. The motor control system further includes a feed forward controller that generates a current command for generating the amount of torque using the brush motor, the current command generated using the estimated motor velocity. The described technical solution solves the technical problem of current sensor fault mitigation of a EPS system based on PMDC drive.

A method for mitigating an electrical actuator fault in a system containing multiple actuators includes: applying multiple predetermined conditions to each of multiple actuators in a vehicle system to identify when at least one of the multiple actuators is in a faulted condition; and increasing an input voltage to all of the actuators to increase an output of the at least one of the multiple actuators in the faulted condition to mitigate the faulted condition.

Embodiments of the present disclosure provide systems, methods, and computer-readable storage media that leverage artificial intelligence and machine learning to identify, diagnose, and mitigate occurrences of network faults or incidents within a network. Historical network incidents may be used to generate a model that may be used to evaluate real-time occurring network incidents, such as to identify a cause of the network incident. Clustering algorithms may be used to identify portions of the model that share similarities with a network incident and then actions taken to resolve similar network incidents in the past may be identified and proposed as candidate actions that may be executed to resolve the cause of the network incident. Execution of the candidate actions may be performed under control of a user or automatically based on execution criteria and the configuration of the fault mitigation system.

Disclosed are procedures for measuring the modulation quality of each message resource element in a failed 5G or 6G communication, thereby revealing the most likely fault locations in the message. The types of modulation deviations in the low-quality message elements can provide further guidance as to the correct demodulation. In addition, after receiving a second copy, the copies can be merged by selecting the highest quality message elements from each version, where the quality is related to how far each message element's modulation deviates from the calibrated “states” of the modulation scheme. The receiver may also determine directional information based on the modulation of each message element, and may compare versions to determine the most likely correct state of each message element. Such strategies may directly recover the original message, or may greatly reduce the number of variations that need to be tested. When implemented, fault mitigation as disclosed herein can resolve message failures, improve communication reliability, reduce latency, and improve network operations overall, according to some embodiments.

A system and method for providing fault mitigation in a vehicle system are provided. The vehicle system has high side drivers (HSDs) and low side drivers (LSDs) are provided. The system includes a first HSD and a plurality of first LSDs. The system also includes a selected first plurality of actuators, with each actuator connected to the first HSD and connected to a respective one of the first LSDs to operate in a first operational mode. The system further includes a second HSD and a plurality of second LSDs. The system also includes a selected second plurality of actuators, with each actuator connected to the second HSD and connected to a respective one of the second LSDs to operate in a second operational mode. When a failed component sets a fault, the corresponding HSD is turned off and the other HSD is turned on, enabling the vehicle system to operate in the non-faulted operational mode.

Unique systems, methods, techniques and apparatuses of fault mitigation are disclosed. One exemplary embodiment is a fault mitigation system for a medium voltage alternating current (MVAC) distribution network including a direct current (DC) link and a control system. The DC link is coupled to a first feeder line and a second feeder line. The control system is structured to determine a first feeder line is deenergized, operate the DC link so as to receive MVAC from a second feeder line and output low voltage alternating current (LVAC) to the first feeder line, operate a plurality of isolation devices, measure the LVAC in response to operating the plurality of isolation devices, determine a fault is isolated from a healthy portion of the first feeder line using the received LVAC measurements, and reenergize the healthy portion of the first feeder line.

A data processing circuit and a fault-mitigating method, which are adapted for a memory having a faulty bit, are provided. The memory is configured to store data related to an image, a weight for a multiply-accumulate (MAC) operation of image feature extraction, and/or a value for an activation operation. Sequence data is written into the memory. The bit number of the sequence data equals to the bit number used for storing data in a sequence block of the memory. The sequence data is accessed from the memory, wherein the access of the faulty bit in the memory is ignored. The value of the faulty bit is replaced by the value of a non-faulty bit in the memory to form new sequence data. The new sequence data is used for MAC. Accordingly, the accuracy of image recognition can be improved for the faulty memory.