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89 results about "Dataflow computation" patented technology

Computer with Hybrid Von-Neumann/Dataflow Execution Architecture

A dataflow computer processor is teamed with a general computer processor so that program portions of an application program particularly suited to dataflow execution may be transferred to the dataflow processor during portions of the execution of the application program by the general computer processor. During this time the general computer processor may be placed in partial shutdown for energy conservation.
Owner:WISCONSIN ALUMNI RES FOUND

Computing time-decayed aggregates in data streams

Aggregates are calculated from a data stream in which data is sent in a sequence of tuples, in which each tuple comprises an item identifier and a timestamp indicating when the tuple was transmitted. The tuples may arrive out-of-order, that is, the sequence in which the tuples arrive are not necessarily in the sequence of their corresponding timestamps. In calculating aggregates, more recent data may be given more weight by multiplying each tuple by a decay function which is a function of the timestamp associated with the tuple and the current time. The tuples are recorded in a quantile-digest data structure. Aggregates are calculated from the data stored in the quantile-digest data structure.
Owner:IOWA STATE UNIV RES FOUND +1

High Integrity Data Network System and Method

A system for transmitting information data packets over a network includes a plurality of parallel transmission channels, each receiving interleaved data words constituting the data packets. Each channel includes a corresponding check sum data generator to compute check sum data for a corresponding sequence of data words. A logic circuit responsive to the interleaved data words from each channel performs an arithmetic operation on the data words from those channels to generate a parity data stream onto a separate channel. A check sum data generator computes checksum data based on the parity data stream. An encoder device downstream from each checksum data generator encodes the data and checksum from each channel for serial transmission over a network.
Owner:LOCKHEED MARTIN CORP

SDN network multi-link fault recovery method and system for multi-stream coexistence

The invention relates to an SDN network multi-link fault recovery method and system for multi-flow coexistence. The method comprises the steps that when it is monitored that a link fault occurs in anSDN network, acquiring starting points and ending points of all faulted links and original paths and bandwidth requirements of all interrupted data streams, updating a network topology, and calculating the available bandwidth of a current normal link; calculating a rerouting path for the interrupted data stream based on the current network topology and the available bandwidth; and generating a flow table entry according to the rerouting path, and installing the flow table entry to a corresponding switch to complete rerouting of the interrupted data flow. The method and the device are suitablefor scenes where multiple link faults exist in the SDN network and multiple data streams pass through each faulted link; in order to minimize the communication cost of a controller and a switch, an original optimization problem is decomposed into a plurality of sub-problems which can be executed in parallel, so that rapid recovery of faults is realized, the installation cost of flow table items isreduced, the service interruption time is shortened, the continuity of data flow is ensured, and the performance of the SDN is improved.
Owner:SHANDONG COMP SCI CENTNAT SUPERCOMP CENT IN JINAN

Multi-core tensor processor of neural network

The invention discloses a multi-core tensor processor of a neural network. The multi-core tensor processor comprises a main controller, a reconstruction controller and a plurality of data flow calculation engines, the main controller is used for providing a control and state interface of the neural network tensor processor for an external control unit, and providing first configuration informationand a first initial signal for the reconstruction controller; the reconstruction controller receives the first configuration information and the first starting signal, obtains a reconstruction instruction of an external memory after the first starting signal is valid, and analyzes the reconstruction instruction to generate multiple groups of second configuration information and second starting signals; and each data flow calculation engine respectively receives the corresponding second configuration information and the second initial signal, performs function configuration according to the second configuration information, acquires data and parameters of the external memory to execute operation after the second initial signal is valid, and writes a calculation result into the external memory. The multi-core tensor processor is suitable for performing centralized calculation on a neural network algorithm, and has universality and expandability.
Owner:厦门壹普智慧科技有限公司

Programmable controller and operation method thereof

The invention discloses a programmable controller and an operation method thereof. The programmable controller comprises a logical operation processor and a function processor, wherein the logical operation processor is used for executing a logical operation instruction according to a data stream computer architecture; the function processor is used for communicating with the logical operation processor to exchange data and used for executing a function instruction based on the data stream computer architecture; and the function instruction and the logical operation instruction are respectively executed by the function processor and the logical operation processor in a basically parallel mode. By adoption of the programmable controller and the operation method thereof, the instructions based on the data stream computer architecture are executed, the technical problem of low execution efficiency caused by sequential execution of the instructions in the conventional programmable controller is solved, and a technical effect of improving instruction execution efficiency is achieved.
Owner:GENERAL ELECTRIC CO

Zero copy data flow based on RDMA

The invention discloses zero copy data flow based on RDMA. The zero copy data flow mainly comprises a memory allocator and an information collector; the memory allocator is used for achieving allocation rules of different memories; the memory classification information collector is used for analyzing a data flow calculation graph and calculating a data source and a data receiving node according to every side in the data flow calculation graph to determine a buffering area management rule of every step. The zero copy data flow based on the RDMA has the advantages that the high tensor transmission speed and high-speed extension of a GPU can be achieved and unnecessary memory copy is eliminated.
Owner:CLUSTAR TECH LO LTD

Dynamic reconfigurable system adaptable to plurality of dataflow computation modes and operating method

The invention relates to the technical field of reconfigurable circuits and systems, and discloses a dynamic reconfigurable system adaptable to a plurality of dataflow computation modes and an operating method. The dynamic reconfigurable system comprises an embedded microprocessor, a configuration controller, a multi-port memory controller and a plurality of reconfigurable processing units. A dataflow communication interface and a control interface, which can be separated, are adopted for each reconfigurable processing unit, so that the embedded microprocessor can be used for dynamically configuring the functions and interconnection structure of each reconfigurable processing unit to be adapted to the dataflow computation modes. Compared with the conventional system with a bus and a fast simplex link (FSL) structure, the system has the advantages that the resource reconfigurability of a field programmable gate array (FPGA) is fully utilized, and functions and structures, which are matched with the dataflow computation modes, are configured during operation to improve a communication bandwidth and the processing performance of dataflow driving application; and moreover, the system is high in structural adaptability and expansibility, and the invention is significant for a dataflow processing-oriented dynamic reconfigurable system.
Owner:SHANGHAI ANLOGIC INFOTECH CO LTD

Verification Of Data Stream Computations Using Third-Party-Supplied Annotations

A third party that performs data stream computation is requested to return not only the solution to the computation, but also “annotations” to the original data stream. The annotations are then used by the data owner (in actuality, a “verifier” associated with the data owner) to check the results of the third party's computations. As implemented, the verifier combines the annotations with the original data, performs some computations, and is then assured of the correctness of the provided solution. The cost of verification is significantly lower to the data owner than the cost of fully processing the data “in house”.
Owner:TRUSTEES OF DARTMOUTH COLLEGE THE +1
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