Product
Patsnap Eureka
For R&D, Patsnap Eureka makes reading and utilizing patents & technical documents easy.
Patsnap Eureka AIR
Designed for self-driven R&D workflows. Generate viable solutions, solve complex R&D challenges, empower your innovation with AI.
Patsnap Eureka Materials
Designed for material experts only. Revolutionize your material R&D, from search, analyze, to developing new materials.
Feature
TechResearch
Generate reliable direction feasibility study reports for your R&D in just a few steps.
TechSeek
Discover and master advanced knowledge NOW. Basics, ideas, possibilities, all at once.
TechMind
As an expert in R&D Theories, TechMind can generates customized viable solutions instantly.
TechRisk
Analyze your overall solution with one click, know your potential R&D risks in advance.
TechMonitor
Get weekly tech updates, stay abreast of the latest tech innovations and key insights.
Patents
Literature
Hiro is an intelligent assistant for R&D personnel, combined with Patent DNA, to facilitate innovative research.
85results about How to "Suppress parasitic capacitance" patented technology
Efficacy Topic
Property
Owner
Technical Advancement
Application Domain
Technology Topic
Technology Field Word
Patent Country/Region
Patent Type
Patent Status
Application Year
Inventor
Thin film transistor, fabrication method thereof and liquid crystal display having the thin film transistor
InactiveUS6855954B1Suppress parasitic capacitanceHigh yieldTransistorSolid-state devicesLiquid-crystal displayBottom gate
The present invention relates to a thin film transistor, a fabrication method thereof and a liquid crystal display having the thin film transistor, and an object of the present invention is to provide a thin film transistor which improves a fabrication yield, a fabrication method thereof and a liquid crystal display having the thin film transistor. In a bottom-gate-type thin film transistor 1 having a gate electrode 4 formed on a substrate, a gate insulating film 6 formed on the gate electrode, an operational semiconductor film 8 formed on the gate insulating film 6 on the gate electrode 4, a channel protection film 3 formed on the operational semiconductor film, and a source and a drain electrodes 14 and 15 formed on both sides of the top surface of the channel protection film 3 connected to the operational semiconductor film with the operational semiconductor, and the channel protection film 3 has a first insulating layer 10 contacting to an upper interface of the operational semiconductor film 8 and a second insulating layer 11 formed on the first insulating layer.
Owner:UNIFIED INNOVATIVE TECH
Charged particle optical system comprising an electrostatic deflector
ActiveUS20100276606A1Improve uniformitySufficient speedStability-of-path spectrometersBeam/ray focussing/reflecting arrangementsElectric fieldAtomic physics
A charged particle optical system comprising a beamlet generator for generating a plurality of beamlets of charged particles and an electrostatic deflector for deflecting the beamlets. The electrostatic deflector comprises first and second electrodes adapted for connection to a voltage for generating an electric field between the electrodes for deflection of the beamlets, the electrodes being at least partially freestanding in an active area of the electrostatic deflector. The electrodes define at least one passing window for passage of at least a portion of the beamlets between the electrodes, the passing window having a length in a first direction and a width in a transverse direction. The system is adapted to arrange the beamlets in at least one row and to direct a single row of the beamlets through the passing window of the electrostatic deflector, the beamlets of the row extending in the first direction. A substantial part of the electrostatic deflector extends beyond the passing window in the first direction.
Owner:ASML NETHERLANDS BV
Active matrix display device
InactiveUS20080036699A1Reduce dataReduce capacitanceStatic indicating devicesElectroluminescent light sourcesResistActive matrix
Owner:INTELLECTUAL KEYSTONE TECH LLC
Active matrix display device
InactiveUS20030206144A1Reduce power consumptionPrevent capacitanceStatic indicating devicesElectroluminescent light sourcesResistCapacitance
An active matrix display device is provided in which parasistic capacitance or the like is suppressed by forming a thick insulating film around an organic semiconductor film, and disconnection or the like does not occur in an opposing electrode formed on the upper layer of the thick insulating film. In the active matrix display device, first, a bank layer composed of a resist film is formed along data lines and scanning lines. By depositing an opposing electrode of a thin film luminescent element on the upper layer side of the bank layer, capacitance that parasitizes the data lines can be suppressed. Additionally, a discontinuities portion is formed in the bank layer. Since the discontinuities portion is a planar section which does not have any a step due to the existence of the bank layer, disconnection of opposing electrode does not occur at this section. When an organic semiconductor film is formed by an ink jet process, a liquid material discharged from an ink jet head is blocked by the bank layer.
Owner:SEIKO EPSON CORP
Touch sensor, embedded touch LCD panel and LCD
ActiveCN103294294AUniform distribution of light transmittanceImprove the display effectStatic indicating devicesMetal/alloy conductorsLiquid-crystal displayParasitic capacitance
The invention discloses a touch sensor, an embedded touch LCD panel and an LCD. The touch sensor includes a plurality of drive electrodes and a plurality of induction electrodes crossed with the drive electrodes, wherein mutual capacitance is formed between the drive electrodes and the induction electrodes; in a matrix structure, a plurality of virtual electrodes are arranged at the residual zone except the drive electrodes and the induction electrodes; and the virtual electrodes, the drive electrodes and the induction electrodes are positioned on the same layer. The LCD panel provided with an embedded touch screen, provided by the technical scheme, has better transmission of light and higher screen luminance, guarantees enough mutual capacitance to enable touch induction signals to be easily detected while reducing stray capacitance among electrodes except the drive electrodes and the induction electrodes in the touch sensor and the LCD panel, and eliminates electrostatic influence of the LCD panel due to finger touch.
Owner:SHANGHAI TIANMA MICRO ELECTRONICS CO LTD
Touch display panel
InactiveCN102096515ASuppress parasitic capacitanceInput/output processes for data processingEngineeringMedia layer
Provided is a touch display panel, comprising a first substrate, a second substrate, a display medium layer, a touch induction component, a shielding conductive layer, an insulating layer, an electrode layer, a first conducting structure and a second conducting structure. The first substrate is provided with a plurality of pixel structures in a display region and with a first pad and a second pad in a peripheral region. The first and the second pads are electrically connected to a first and second potentials respectively. The display medium layer is disposed between the first substrate and the second substrate. The touch induction component is disposed on the outer surface of the second substrate. The shielding conductive layer is arranged on the inner surface of the second substrate. The insulating layer and the electrode layer are arranged on the shielding conductive layer in order, facing towards the first substrate. The first conducting structure lies in the peripheral region and makes the shielding conductive layer be electrically connected to the first pad. The second conducting structure lies in the peripheral region and makes the electrode layer be electrically connected to the second pad.
Owner:AU OPTRONICS CORP
Inductor element and integrated electronic component
InactiveUS20080048816A1Increase valueSuppress emergence of parasitic capacitanceImpedence networksFixed transformers or mutual inductancesInductorEngineering
An inductor element and an integrated electronic component that facilitate achieving a higher Q value are provided. The inductor element includes a substrate, a coil unit spaced from the substrate, and a plurality of conductive columns. The coil unit includes a plurality of spiral coils each constituted of a spiral-shaped coil lead. The spiral coils are disposed such that their winding directions are the same, and that the coil lead of each spiral coil includes a portion extending between the coil lead of at least one of the other spiral coils. End portions of the spiral coils are fixed to the substrate via the conductive columns. The integrated electronic component of the invention includes such inductor element.
Owner:FUJITSU LTD
Bi-directional bus circuitry executing bi-directional data transmission while avoiding floating state
InactiveUS6857039B1Suppress parasitic capacitanceDigital storageInput/output processes for data processingData transmissionEmbedded system
A data bus included in a bi-directional bus circuitry is divided into a first bus node and a second bus node by a repeater circuit. The repeater circuit includes a first tristate buffer for amplifying and transmitting data from the first bus node to the second bus node, and a second tristate buffer connected in reverse direction. When the data bus is not used, the first and second tristate buffers are both activated, and the repeater circuit functions as a latch circuit. Therefore, in the bi-directional bus circuitry, even when the data bus is not used, the potential level of the data bus can be prevented from being left unfixed, ensuring stable operation.
Owner:RENESAS ELECTRONICS CORP
Liquid crystal display
InactiveUS20140267962A1Inhibit deteriorationSuppress generationStatic indicating devicesNon-linear opticsLiquid-crystal displayEngineering
A liquid crystal display according to an exemplary embodiment of the present disclosure includes a gate line positioned on a first substrate; a data line positioned on the first substrate that crosses the gate line and includes a first data line and a second data line which are positioned at the left and right for every unit pixel, respectively; and a shielding electrode that extends parallel to the data line and overlaps a portion between the second data line of the first pixel and the first data line of the second pixel. The unit pixel includes a first pixel and a second pixel adjacent to the first pixel and the second data line of the first pixel is adjacent to the first data line of the second pixel.
Owner:SAMSUNG DISPLAY CO LTD
Semiconductor memory device and method for fabricating the same
InactiveUS20110018057A1Reducing GIDL occurrenceSuppress parasitic capacitanceSemiconductor/solid-state device manufacturingSemiconductor devicesDevice materialEngineering
A manufacturing method of a semiconductor device comprises forming a semiconductor substrate including an active region and an element isolation film, forming a first recess on the semiconductor substrate, forming an oxide film on a sidewall of the first recess, forming a second recess by etching a lower part of the first recess, and forming a gate in a lower part of the second recess.
Owner:SK HYNIX INC
Contact arrangement
ActiveUS6932620B2Improve featuresSuppress parasitic capacitanceWindowsVehicle connectorsElectrical conductorParasitic capacitance
An elastic member made of a metallic conductor is installed inside a main body. A contact head made of a conductor is pressed by a force exerted from the elastic member against an object to be contacted. The contact head is connected to a wire constituting a part of an electric conduction path. An insulator for breaking electric continuity between the elastic member and the contact head is inserted between the elastic member and the contact head. In addition to establishing electrical continuity with the object to be contacted using the wire and the contact head rather than the elastic member, the elastic member is insulated from the contact head and placed apart from the contact head to suppress parasitic capacitance between the elastic member and the contact head.
Owner:KOJIMA PRESS IND CO LTD +1
Head rest device
InactiveUS7770967B2Reduce capacityStable detectionVehicle seatsOperating chairsCapacitanceEngineering
A head rest device that improves reliability of detecting a head on the basis of a change in capacitance without complicating a wiring structure. A head rest device is provided with a head rest rear portion configured to be supported to a seat back, and a head rest front portion freely moving forward and backward between a fully-closed position coming close to the head rest rear portion and a fully-open position separated from the head rest rear portion. The head rest front portion is moved by an actuator. The head rest front portion has a sensor electrode structured such that its capacitance is changed as a head of an occupant approaches, and an ECU controlling the actuator so as to move the head rest front portion and detecting the approach of the head of the occupant on the basis of a change of the capacitance of the sensor electrode thereon.
Owner:AISIN SEIKI KK +2
Light-emitting device and electronic apparatus
ActiveUS20120104401A1Suppress parasitic capacitanceReduce capacityTransistorElectroluminescent light sourcesEngineeringLight emitting device
A light-emitting device includes a drive transistor for controlling the quantity of current supplied to a light-emitting element, a capacitor element electrically connected to a gate electrode of the drive transistor, and an electrical continuity portion for electrically connecting the drive transistor and the light-emitting element, these elements being disposed on a substrate. The electrical continuity portion is disposed on the side opposite to the capacitor element with the drive transistor disposed therebetween.
Owner:LUMITEK DISPLAY TECH LTD
Display panel and display device
ActiveCN109360851ASuppress parasitic capacitanceIncrease widthStatic indicating devicesSolid-state devicesDisplay deviceLuminescence
The invention provides a display panel and a display device. The display panel comprises a pixel driving circuit, a driving transistor and a first connecting portion. The pixel driving circuit comprises scanning lines, data lines and a power line, the scanning lines are used for transmitting scanning signals, the data lines are used for transmitting data signals, and the power line is used for transmitting constant voltage signals; the scanning lines are positioned on a first metal layer, the power line is positioned on a second metal layer, the data lines are positioned on a third metal layer, and the second metal layer is positioned between the first metal layer and the third metal layer; a gate electrode of the driving transistor is positioned on the first metal layer and is connected with the first connecting portion; the power line is positioned between the data lines and the first connecting portion. The display panel and the display device have the advantages that coupling parasitic capacitance of the data lines and first coupling portion can be diminished, offset of driving currents of the driving transistor can be diminished, and interference on the luminescence intensityof organic luminescence components can be diminished.
Owner:WUHAN TIANMA MICRO ELECTRONICS CO LTD
Field-effect transistor
ActiveUS8507919B2Prevent rise in channel temperatureSuppress parasitic capacitanceSemiconductor/solid-state device manufacturingSemiconductor devicesOhmic contactParasitic capacitance
A field-effect transistor (FET) in which a gate electrode is located between a source electrode formed on one side of the gate electrode and a drain electrode formed on the other side, a source ohmic contact is formed under the source electrode and a drain ohmic contact is formed under the drain electrode. In the FET, the rise in the channel temperature is suppressed, the parasitic capacitance with a substrate is decreased, and the temperature dependence of drain efficiency is reduced, so that highly efficient operation can be achieved at high temperatures. The drain electrode is divided into a plurality of drain sub-electrodes spaced from each other and an insulating region is formed between the drain ohmic contacts formed under the drain sub-electrodes.
Owner:MITSUBISHI ELECTRIC CORP
A double T-shaped gate, and a manufacturing method and an application thereof
InactiveCN109103245AImprove the problem of low exposure efficiencyIncrease production capacitySemiconductor devicesParasitic capacitanceEngineering
A double T-shaped gate, and a manufacturing method and an application thereof are provided. The double T-shaped gate comprises a gate foot, a gate root and a gate cap, wherein the gate foot and the gate root form a first level T-shaped gate, the gate root and the gate cap form a second level T-shaped gate, the gate cap is suspended, and the gate foot grows on a substrate through a dielectric passivation layer. The invention can reduce the gate resistance, and the manufacturing method thereof not only can effectively realize the small line width gate, reduce the gate parasitic capacitance, butalso can improve the efficiency of the gate fabrication.
Owner:XIAMEN SANAN INTEGRATED CIRCUIT
Power transmitting apparatus, power receiving apparatus, and power transmission system
InactiveCN102510110ARelative position accuracy requirements are not strictReduce couplingBatteries circuit arrangementsElectromagnetic wave systemElectric power transmissionEngineering
A power transmitting apparatus (101) has a power transmitting apparatus side active electrode (12) provided within the casing thereof along a seat (10D). A power transmitting apparatus side passive electrode (11) is exposed on a backrest (10B). A power receiving apparatus (201) has a power receiving apparatus side active electrode (22) formed along the bottom surface thereof. A power receiving apparatus side passive electrode (21) is formed on the outer surface of the casing (20) of the power receiving apparatus (201). By mounting the power receiving apparatus (201) on a mounting portion of the power transmitting apparatus (101), the power receiving apparatus side active electrode (22) faces the power transmitting apparatus side active electrode (12) with a dielectric layer therebetween, and the power receiving apparatus side passive electrode (21) is directly electrically connected to the power transmitting apparatus side passive electrode (11).
Owner:MURATA MFG CO LTD
Touch display device
ActiveCN103927032ASuppress parasitic capacitanceAvoid interferenceInput/output processes for data processingDisplay deviceEngineering
Owner:HANNSTAR DISPLAY CORPORATION
Touch display apparatus
InactiveUS20140198060A1Reduce manufacturing costAvoid noise disturbanceInput/output processes for data processingTouch panelElectrical and Electronics engineering
A touch display apparatus including a display panel, a touch panel, a transparent conductive layer, and a conductive adhesive layer is provided. The touch panel is disposed on the display panel, and includes a cover lens, a touch device, and a shielding conductive ring. The touch device is disposed on the cover lens and located between the display panel and the cover lens. The shielding conductive ring is disposed on the cover lens and located between the display panel and the cover lens. The shielding conductive ring surrounds the touch device. The transparent conductive layer is disposed on the display panel and located between the display panel and the touch panel. The conductive adhesive layer is disposed between the display panel and the touch panel. The shielding conductive ring is electrically connected with the transparent conductive layer through the conductive adhesive layer.
Owner:HANNSTAR DISPLAY CORPORATION
Semiconductor device
ActiveUS20150179741A1Current be suppressedSuppress parasitic capacitanceSemiconductor/solid-state device manufacturingSemiconductor devicesHigh resistanceOhmic contact
A parasitic capacitance and a leak current in a nitride semiconductor device are reduced. For example, a 100 nm-thick buffer layer made of AlN, a 2 μm-thick undoped GaN layer, and 20 nm-thick undoped AlGaN having an Al composition ratio of 20% are epitaxially grown in this order on, for example, a substrate made of silicon, and a source electrode and a drain electrode are formed so as to be in ohmic contact with the undoped AlGaN layer. Further, in the undoped GaN layer and the undoped AlGaN layer immediately below a gate wire, a high resistance region, the resistance of which is increased by for example, ion implantation with Ar or the like, is formed, and a boundary between the high resistance region and an element region is positioned immediately below the gate wire.
Owner:PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD
Field-effect transistor
ActiveUS20110233559A1Block riseReduce parasitic capacitanceSemiconductor/solid-state device manufacturingSemiconductor devicesOhmic contactParasitic capacitance
A field-effect transistor (FET) in which a gate electrode is located between a source electrode formed on one side of the gate electrode and a drain electrode formed on the other side, a source ohmic contact is formed under the source electrode and a drain ohmic contact is formed under the drain electrode. In the FET, the rise in the channel temperature is suppressed, the parasitic capacitance with a substrate is decreased, and the temperature dependence of drain efficiency is reduced, so that highly efficient operation can be achieved at high temperatures. The drain electrode is divided into a plurality of drain sub-electrodes spaced from each other and an insulating region is formed between the drain ohmic contacts formed under the drain sub-electrodes.
Owner:MITSUBISHI ELECTRIC CORP
Photodetector circuit, input device, and input/output device
ActiveUS20120146027A1Adverse effectSuppress parasitic capacitanceSolid-state devicesSemiconductor/solid-state device manufacturingPhotovoltaic detectorsPhotodetector
An adverse effect of parasitic capacitance on optical data output from a photodetector circuit is suppressed. A photodetector circuit includes a photoelectric conversion element; a first field-effect transistor; a second field-effect transistor; a first conductive layer functioning as a gate of the first field-effect transistor; an insulating layer provided over the first conductive layer; a semiconductor layer overlapping with the first conductive layer with the insulating layer interposed therebetween; a second conductive layer electrically connected to the semiconductor layer; and a third conductive layer electrically connected to the semiconductor layer, whose pair of side surfaces facing each other overlaps with at least one conductive layer including the first conductive layer with the insulating layer interposed therebetween, and which functions as the other of the source and the drain of the first field-effect transistor.
Owner:SEMICON ENERGY LAB CO LTD
Semiconductor memory device and method of fabricating the same
ActiveUS7763542B2Suppress parasitic capacitanceSemiconductor/solid-state device detailsSolid-state devicesDielectricBit line
A semiconductor memory device includes a semiconductor substrate. An inter-layer dielectric is disposed on the semiconductor substrate. A bit line is disposed on the inter-layer dielectric. A bit line spacer is fabricated of a nitride layer containing boron and / or carbon and covers sidewalls of the bit line. A method of fabricating the semiconductor memory device is also provided.
Owner:SAMSUNG ELECTRONICS CO LTD
Method for manufacturing semiconductor device
ActiveUS20120135592A1Parasitic capacitanceReduce step differenceSolid-state devicesSemiconductor/solid-state device manufacturingBit lineCell region
A method for manufacturing a semiconductor device is disclosed, which reduces a step difference between a peripheral region and a cell region. In the semiconductor device, a metal contact of the peripheral region is configured in a multi-layered structure. Prior to forming a bit line and a storage node contact in the cell region, a contact and a line are formed in the peripheral region, such that a step difference between the cell region and the peripheral region is reduced, resulting in a reduction in parasitic capacitance between lines.
Owner:SK HYNIX INC
Reflection sheet, backlight assembly and display device
InactiveCN1776495AIncrease brightnessImprove emission efficiencyNon-linear opticsDisplay deviceOptoelectronics
The present invention provides a reflective sheet for improving display quality, a backlight unit including the reflective sheet, and a display device including the backlight unit. The reflective sheet includes a reflective layer and a heat dissipation layer. The reflective layer reflects light provided from the light source. The heat dissipation layer is in contact with the reflection layer to dissipate heat generated from the light source. The heat dissipation layer insulates the light source from the accommodating member to suppress leakage current of the power supply.
Owner:SAMSUNG ELECTRONICS CO LTD
Semiconductor device and method for manufacturing the same
InactiveUS20130140576A1Suppress parasitic capacitanceHigh carrier mobilitySemiconductor/solid-state device manufacturingSemiconductor devicesPower semiconductor deviceSemiconductor
A semiconductor device, and a method for manufacturing the same, comprises a source / drain region formed using a solid phase epitaxy (SPE) process to provide partially isolated source / drain transistors. Amorphous semiconductor material at the source / drain region is crystallized and then shrunk through annealing, to apply tensile stress in the channel direction.
Owner:SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP
Method for manufacturing semiconductor device having multi-layered contact
ActiveUS8298893B2Parasitic capacitanceReduce step differenceSolid-state devicesSemiconductor/solid-state device manufacturingBit lineCell region
A method for manufacturing a semiconductor device is disclosed, which reduces a step difference between a peripheral region and a cell region. In the semiconductor device, a metal contact of the peripheral region is configured in a multi-layered structure. Prior to forming a bit line and a storage node contact in the cell region, a contact and a line are formed in the peripheral region, such that a step difference between the cell region and the peripheral region is reduced, resulting in a reduction in parasitic capacitance between lines.
Owner:SK HYNIX INC
Display device
InactiveUS20050264509A1Suppress parasitic capacitanceCathode-ray tube indicatorsNon-linear opticsDisplay deviceParasitic capacitance
Owner:SANYO ELECTRIC CO LTD
Passenger seat having occupant detector and seat heater covered with waterproof sheet
InactiveUS7663378B2High sensitivityPrevent water penetrationVehicle seatsResistance/reactance/impedenceOn boardParasitic capacitance
A passenger seat device includes a detector electrode for detecting occupancy of the seat, a seat heater powered by an on-board electric power source, and a waterproof sheet for preventing water permeated into the seat from reaching the seat heater. Whether the seat is occupied or not is detected based on changes in an impedance coupled to the detector electrode. The impedance is affected by the water if it reaches the seat heater, and a sensitivity of the occupancy detection is adversely affected. A shielding electrode insulated from the detector electrode and disposed between the detector electrode and the seat heater may be provided to reduce an amount of parasitic capacitance formed between the detector electrode and the seat heater. An alternating voltage may be supplied to the detector electrode and the shielding electrode.
Owner:DENSO CORP
Display device with touch detection function and electronic apparatus
ActiveUS20170315639A1Suppress parasitic capacitanceSmall sizeInput/output processes for data processingDisplay deviceEngineering
According to an aspect, a display device with a touch detection function includes a plurality of drive electrodes that face a plurality of pixel electrodes in an orthogonal direction to the surface of the substrate, and extend in a direction parallel to the direction in which a plurality of signal lines extend. The display device with a touch detection function also includes a scan driving unit that applies a touch drive signal to a signal line that faces, in an overlapping manner in the orthogonal direction, a drive electrode to which the touch drive signal is applied.
Owner:JAPAN DISPLAY INC
Who we serve
- R&D Engineer
- R&D Manager
- IP Professional
Why Patsnap Eureka
- Industry Leading Data Capabilities
- Powerful AI technology
- Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.
© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com