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182results about How to "Reduce package thickness" patented technology

Lighting device, display, and method for manufacturing the same

A display, a lighting device and a method for manufacturing the lighting device are provided. The lighting device comprises a substrate, an electrode layer, a plurality of light source units and a light scattering layer, which is covered by a transparent layer and a reflector layer to create a uniform surface light within an ultra thin format. A yellow phosphor layer is disposed above the reflector layer to create white light when a blue LED or UV LED is used. The lighting device also provides a unique electrode layout design which can be applied for local dimming control and can be easily applied for large size product applications.
Owner:LUXINGTEK

Wafer level package with die receiving cavity and method of the same

The present invention provides a structure of package comprising a substrate with a die receiving cavity formed within an upper surface of the substrate and a through hole structure formed there through, wherein a terminal pad is formed under the through hole structure and the substrate includes a conductive trace formed on a lower surface of the substrate. A die is disposed within the die receiving cavity by adhesion and a dielectric layer formed on the die and the substrate. A re-distribution metal layer (RDL) is formed on the dielectric layer and coupled to the die and the through hole structure. Conductive bumps are coupled to the terminal pad.
Owner:ADVANCED CHIP ENG TECH

Low thermal resistance LED package

A LED chip is bonded on a large submount serving as a heat sink. The submount is punched out from a thin metal sheet together with two other sections of lead frames for the LED and held together with insulating material. The planar structure makes the package thin. A transparent lens may be mounted over the submount. More than one LED of same or different color can be mounted on the submount.
Owner:PROLIGHT OPTO TECH +1

Wafer level molded opto-couplers

Optocoupler packages and methods of making the same. An exemplary package comprises a substrate having a first surface, a second surface opposite the first surface, and a body of electrically insulating material disposed between the first and second surfaces; a first optoelectronic device embedded in the body of electrically insulating material of the substrate and disposed between the substrate's first and second surfaces, the first optoelectronic device having a first conductive region and a second conductive region; a second optoelectronic device embedded in the body of electrically insulating material of the substrate and disposed between the substrate's first and second surfaces and optically coupled to the first optoelectronic device, the second optoelectronic device having a first conductive region and a second conductive region; and a plurality of electrical traces disposed on one or both surfaces of the substrate and electrically coupled to the conductive regions of the optoelectronic devices.
Owner:SEMICON COMPONENTS IND LLC

Chip stack package and method of fabricating the same

A chip stack package is provided, wherein semiconductor chips having different die sizes are stacked by arranging pads in a scribe region through a redistribution process, so that the thickness of the package can be reduced. A method of fabricating the chip stack package is also provided. In the chip stack package, a plurality of circuit patterns are arranged on one surface of a substrate, and a unit semiconductor chip is mounted thereon. The unit semiconductor chip includes a plurality of semiconductor chips sequentially stacked on the substrate. The semiconductor chips of the unit semiconductor chip have different die sizes. One of the semiconductor chips includes a plurality of first pads arranged in a first chip region, and the other semiconductor chips include second pads arranged in a scribe region at an outside of a second chip region defined by the scribe region.
Owner:SAMSUNG ELECTRONICS CO LTD

Package structure of organic electroluminescent device and package method thereof

A package structure of an organic electroluminescent (OEL) device and a method of packaging thereof are provided. The package structure includes a substrate, an OEL component, a cover plate, a desiccant and an adhesive. The OEL component is disposed over the substrate. The cover plate is disposed over the substrate. The desiccant is disposed above the substrate or the cover plate. The desiccant includes, for example but not limited to, a hydrophilic polymer. The adhesive is disposed between the substrate and the cover plate, wherein the OEL component and the desiccant are sealed by the substrate, the cover plate and the adhesive. Therefore, moisture / oxygen in the package structure is absorbed and removed by the hydrophilic polymer.
Owner:RITDISPLAY

Packaging body capable of repeatedly stacking

The invention relates to a package which can be repeatedly piled, comprising a substrate which has a plurality of first welding pads; a chip which is arranged on the substrate and exposes an active surface which is in electric connection with the substrate; a plurality of second welding pads which are arranged on the active surface of the chip; and a package colloid which is arranged on the substrate for covering part of the chip, wherein, the package colloid forms a groove on the active surfaces and exposes second welding pads on the active surface; a plurality of conductive balls are arranged on the second welding pads for electrically connecting first welding pads of another package which can be repeatedly piled. Two packages are piled with the mode of flip chip, the periphery of the substrate is protected by the package colloid, thereby reducing the use of wire leads and improving the warping problem of the two piled packages.
Owner:POWERTECH TECHNOLOGY

Fan-out package structure and manufacturing method thereof

The invention provides a fan-out package structure and a manufacturing method thereof. The structure comprises a chip having electrodes. The active surface of the chip is upward; the chip is circumferentially filled with a first insulating resin layer; the top portion of the first insulating resin layer is higher than the upper surface of the chip; the chip and the top portion of the first insulating resin layer are covered by a second insulating resin layer; the surface of the second insulating resin layer is provided with a re-wiring layer which is connected with the electrodes of the chip through openings of the second insulating resin layer; the second insulating resin layer and the re-wiring layer are covered by a third insulating resin layer; the third insulating resin layer is provided with openings for exposing bonding pads of the re-wiring layer; the bonding pads of the re-wiring layer are connected with conductive columns; the conductive columns are electrically connected with the electrodes on the active surface of the chip through the re-wiring layer; and the lower surface of the chip and the bottom of the first insulating resin layer are provided with a protection layer. The package structure does not have a bearing piece, thereby helping to reduce package thickness, and meanwhile, enlarging application range of the technology; and copper columns are not prepared on the chip, thereby facilitating to reduce the cost.
Owner:NAT CENT FOR ADVANCED PACKAGING

Circuit device and manufacturing method thereof

InactiveUS20050212107A1Shorten manufacture stepQuickly deliverFinal product manufactureResistor terminals/electrodesEngineeringSolder material
In the case of mounting a passive element in a circuit device, since an electrode part is tin-plated, the passive element is fixed to a mounting land part by use of a solder material, and wires cannot intersect with each other in a single layer. Accordingly, there are problems such as an increase in a mounting area, a restriction to a reflow temperature in mounting on a printed board, and deterioration of reliability due to solder crack after packaging. The electrode part of the passive element is gold-plated, and a bonding wire is directly fixed to the electrode part. Thus, a packaging density can be improved. Moreover, a package structure using no supporting substrate is adopted, and the passive element is bonded to an isolation trench. Thus, even in a structure having the bonding wire fixed therein, an increase in a package thickness is suppressed.
Owner:SANYO ELECTRIC CO LTD
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