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130 results about "Verified procedure" patented technology

System and method for verifying the age and identity of individuals and limiting their access to appropriate material and situations

Limiting access to the Internet, intranets, computers, appliances, websites, individuals and / or other venues, for example, by providing an access account, to an “in person” and / or otherwise verified “adult” who assumes responsibility for such account's use for accessing appropriate material, websites and / or individuals, while empowered by control of a “single access account” that filters inappropriate material, websites and / or individuals based on (1) profiles created by such adults and stored on provider's “access server,” and / or elsewhere, and / or (2) “mandatory” provider imposed filtering. Further, helping “producers” comply with 18 U.S.C. 2257 by adopting the “verification process” to protect children.
Owner:GLASS PAUL H

Method of software distribution via the internet

In one general aspect there is provided a method for distributing software. The method comprising (a) a software user creating a user profile which includes one or more types of biometric data; (b) providing the biometric data to a software distributor; (c) obtaining the software; and (d) utilizing the software on the user's computer having a biometric sensing device that senses or measures a biometric parameter of the user useful for creating biometric data, wherein utilizing the software causes the activation of a verification program or function that compares the sensed or measured biometric data to the biometric data in the user profile. In another aspect, the invention relates to a method of handicapping two or more players of a game of skill, wherein the players are of varying skill levels. Also provided are methods of ranking players according to skill level and generating a professional gaming league based on skill level. Also provided is a system and an apparatus for verifying the identity of a user in a game of skill.
Owner:DEYONKER JAMES JOSEPH +1

Seek window verify program system and method for a multilevel non-volatile memory integrated circuit system

A memory comprises a plurality of digital multilevel memory cells. A window of valid data voltages for accessing the said plurality of digital multilevel memory cells is detected. The window may be detected by incrementing a first programming voltage to program data in the plurality of memory cells and verifying whether the data in at least one of said plurality of memory cells is properly programmed. The incrementing and verifying may be repeated until data is verified to be properly programmed in one of said plurality of memory cells. The data in each memory cell of said plurality of memory cells is verified. The verification may be by incrementing a second programming voltage, and verifying whether data in each memory cell is properly programmed within a margin. The incrementing and verifying is repeated for each memory cell outside of the margin.
Owner:SILICON STORAGE TECHNOLOGY

Method and apparatus for verifying data local to a single thread

A method and apparatus are used in accordance with the present invention in concurrent program analysis for detecting potential race conditions such as data races in computer programs. A feature of the method and apparatus of the present invention is verifying annotations of addressable resources in a program. The present invention verifies annotations by checking if thread-local resources are indeed thread-local, and that thread-shared data spaces are not in fact thread-local. In accordance with the purpose of the invention, the method provides for detecting potential race conditions, such as data races, in a computer program. The computer program can spawn a plurality of threads that are capable of being executed concurrently. The method includes receiving a source code of the computer program. The source code includes an element annotated as either thread-local or thread-shared. The method also includes verifying the validity of the thread-local annotation if the element is annotated in the computer program as thread-local, wherein an invalid thread-local annotation may cause a race condition. The method can further include indicating a potential race condition if upon verifying the validity of the thread-local annotation it is determined that the element or a portion thereof is visible from more than one, rather than one and only one, of the plurality of threads. In further accordance with the purpose of the invention, the apparatus for concurrent program analysis includes means for receiving source code of the computer program. The source code includes an element annotated as either thread-local or thread-shared. The apparatus also includes means for type checking the source code; and means for thread-local checking located either inside or in series with the type checking means. The means for thread-local checking includes means for verifying the validity of the thread-local annotation if the element is annotated in the computer program as thread-local, where an invalid thread-local annotation may cause a race condition such as a data race. The apparatus can further include means for parsing the source code; and means for creating from the source code an abstract syntax tree. Accordingly, the present invention beneficially provides for a more effective concurrent program analysis.
Owner:VALTRUS INNOVATIONS LTD +1

Correctness verifying method of cache consistency protocol

The invention provides a correctness verifying method of a cache consistency protocol. After a computer enters an operating system, the complexity of a core and the application of the operating system is higher; the action of a processor is not easy to control accurately; therefore, in order to keep verification correctness, a verifying program for the cache consistency protocol is necessary to embed in a systematic procedure; the program is embedded in a BIOS (basic input/output system) code; after the initialization of a memory subsystem is completed at the initialization initial stage of the system, the verifying program is started to be executed; the verifying program needs to be capable of accurately controlling actions of each processor of the system, supports a user to select a verification item to be particularly executed, and feeds back a verification result to the user; by using the method, the verification of the correctness of the cache consistency protocol is realized at a system level; all application scenes of a real system can be completely covered; the disadvantages that a conventional verifying method based on an analog way is low in efficiency and poor in verification coverage rate are made up; the design period and the verifying period of an inter-domain cache consistency chip of the processor can be shortened; the one-time taping-out mission success rate of the chip can be guaranteed effectively; and therefore, the correctness verifying method has an extremely wide development prospect and an extremely high technical value.
Owner:LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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