The invention relates to a floating gate
memristor. The basic structure of the floating gate
memristor successively includes a front
electrode, a front
dielectric layer, a front floating gate layer, a nanometer battery
anode, a nanometer
battery electrolyte, a nanometer battery
cathode, a rear floating gate layer, a rear
dielectric layer and a rear
electrode, wherein the front
electrode, the front
dielectric layer, the front floating gate layer and the nanometer battery
anode simulate a presynaptic membrane which converting electronic signals to
ion signals by utilizing electronic tunnel transfer and
field effect; the nanometer
battery electrolyte serves an
ion channel simulating a
synaptic cleft; the nanometer battery
cathode, the rear floating gate, the rear
dielectric layer and the rear electrode simulate a subsynaptic membrane which converts the
ion signals to electronic signals. The floating gate
memristor is stable in reading and writing, good in
controllability, simple in structure, compatible to
CMOS, easy to integrate, suitable for large scale production and commercialization and capable of promoting development of
nervous system calculation and encephaloid calculation.