74 results about "Pre synaptic" patented technology

Apparatus and methods for efficient synaptic update in a network such as a spiking neural network. In one embodiment, the post-synaptic updates, in response to generation of a post-synaptic pulse by a post-synaptic unit, are delayed until a subsequent pre-synaptic pulse is received by the unit. Pre-synaptic updates are performed first following by the post-synaptic update, thus ensuring synaptic connection status is up-to-date. The delay update mechanism is used in conjunction with system “flush” events in order to ensure accurate network operation, and prevent loss of information under a variety of pre-synaptic and post-synaptic unit firing rates. A large network partition mechanism is used in one variant with network processing apparatus in order to enable processing of network signals in a limited functionality embedded hardware environment.

Methods and systems for modifying at least one synapse of a physicallelectromechanical neural network. A physical / electromechanical neural network implemented as an adaptive neural network can be provided, which includes one or more neurons and one or more synapses thereof, wherein the neurons and synapses are formed from a plurality of nanoparticles disposed within a dielectric solution in association with one or more pre-synaptic electrodes and one or more post-synaptic electrodes and an applied electric field. At least one pulse can be generated from one or more of the neurons to one or more of the pre-synaptic electrodes of a succeeding neuron and one or more post-synaptic electrodes of one or more of the neurons of the physical / electromechanical neural network, thereby strengthening at least one nanoparticle of a plurality of nanoparticles disposed within the dielectric solution and at least one synapse thereof.

Apparatus and methods for partial evaluation of synaptic updates in neural networks. In one embodiment, a pre-synaptic unit is connected to a several post synaptic units via communication channels. Information related to a plurality of post-synaptic pulses generated by the post-synaptic units is stored by the network in response to a system event. Synaptic channel updates are performed by the network using the time intervals between a pre-synaptic pulse, which is being generated prior to the system event, and at least a portion of the plurality of the post synaptic pulses. The system event enables removal of the information related to the portion of the post-synaptic pulses from the storage device. A shared memory block within the storage device is used to store data related to post-synaptic pulses generated by different post-synaptic nodes. This configuration enables memory use optimization of post-synaptic units with different firing rates.

Apparatus and methods for modulated plasticity in a spiking neuron network. A plasticity mechanism may be configured for example based on a similarity measure between post-synaptic activities of two or more neurons that may be receiving the same feed-forward input. The similarity measure may comprise a dynamically determined cross-correlogram between the output spike trains of two neurons. An a priori configured similarity measure may be used during network operation in order to update efficacy of inhibitory connections between neighboring neurons. Correlated output activity may cause one neuron to inhibit output generation by another neuron thereby hindering responses by multiple neurons to the same input stimuli. The inhibition may be based on an increased efficacy of inhibitory lateral connection. The inhibition may comprise modulation of the pre synaptic portion the plasticity rule based on efficacies of feed-forward connection and inhibitory connections and a statistical parameter associated with the post-synaptic rule.

Methods and systems are disclosed herein in which a physical neural network can be configured utilizing nanotechnology. Such a physical neural network can comprise a plurality of molecular conductors (e.g., nanoconductors) which form neural connections between pre-synaptic and post-synaptic components of the physical neural network. Additionally, a learning mechanism can be applied for implementing Hebbian learning via the physical neural network. Such a learning mechanism can utilize a voltage gradient or voltage gradient dependencies to implement Hebbian and / or anti-Hebbian plasticity within the physical neural network. The learning mechanism can also utilize pre-synaptic and post-synaptic frequencies to provide Hebbian and / or anti-Hebbian learning within the physical neural network.

A physical neural network is disclosed, which comprises a liquid state machine. The physical neural network is configured from molecular connections located within a dielectric solvent between pre-synaptic and post-synaptic electrodes thereof, such that the molecular connections are strengthened or weakened according to an application of an electric field or a frequency thereof to provide physical neural network connections thereof. A supervised learning mechanism is associated with the liquid state machine, whereby connections strengths of the molecular connections are determined by pre-synaptic and post-synaptic activity respectively associated with the pre-synaptic and post-synaptic electrodes, wherein the liquid state machine comprises a dynamic fading memory mechanism.

Apparatus and methods for partial evaluation of synaptic updates in neural networks. In one embodiment, a pre-synaptic unit is connected to a several post synaptic units via communication channels. Information related to a plurality of post-synaptic pulses generated by the post-synaptic units is stored by the network in response to a system event. Synaptic channel updates are performed by the network using the time intervals between a pre-synaptic pulse, which is being generated prior to the system event, and at least a portion of the plurality of the post synaptic pulses. The system event enables removal of the information related to the portion of the post-synaptic pulses from the storage device. A shared memory block within the storage device is used to store data related to post-synaptic pulses generated by different post-synaptic nodes. This configuration enables memory use optimization of post-synaptic units with different firing rates.

The invention discloses an unsupervised learning method of handwritten digit identification. The method comprises the following steps: firstly, establishing a spiking neural network model, and determining the connection mode between neurons according to an analog biological information processing mechanism; secondly, establishing a spiking time dependent plasticity model according to the synaptictrace learning rules; and finally, optimizing the pre-synaptic initial weight and the synaptic delay in the spiking neural networks by using a genetic algorithm, training and testing the MNIST (MixedNational Institute of Standards and Technology database) data set, thus achieving the unsupervised learning of handwritten digit identification. According to the unsupervised learning method of handwritten digit identification, experiments show that the training speed is effectively improved and the recognition accuracy is improved.

A system for independent component analysis includes a feedback mechanism based on a plasticity rule, and an electro-kinetic induced particle chain, wherein the feedback mechanism and the electro-kinetic induced particle chain is utilized to extract independent components from a data set or data stream. The electro-kinetic induced particle chain is generally composed of a plurality of interconnected nanoconnections (e.g., nanoparticles) disposed between at least two electrodes in a solution, including for example one or more pre-synaptic electrodes and one or more post-synaptic electrodes. The feedback mechanism generally provides feedback to one or more particles within the electro-kinetic induced particle chain, while the plasticity rule can be non-linear in nature. The feedback mechanism also provides for one or more evaluate phases and one or more feedback phases.

A framework for organization of neural assemblies. Stable neural circuits are formed by generating comprehensions. A packet of neurons projects to a target neuron after stimulation. A target neuron in STDP state is recruited if it fires within a STDP window. Recruitment leads to temporary stabilization of the synapses. The stimulation periods followed by decay periods lead to an exploration of cut-sets. Comprehension results in successful predictions and prediction-mining leads to flow. Flow is defined as the production rate of signaling particles needed to maintain communication between nodes. The comprehension circuit competes for prediction via local inhibition. Flow can be utilized for signal activation and deactivation of post-synaptic and pre-synaptic plasticity. Flow stabilizes the comprehension circuit.

Disclosed is a semiconductor device used to embody a neuromorphic computation system and operation method thereof. By comprising a floating body as a short-term memory means electrically isolated from the surroundings and a long-term memory means formed at one side of the floating body not formed of a source, a drain and a gate, a low power synaptic semiconductor device is provided, which can be mimic not only the short-term memory in a nervous system of a living body by an impact ionization, but also the short- and long-term memory transition property and the causal inference property of a living body due to the time difference of signals of the pre- and post-synaptic neurons.

Apparatus and methods for modulated plasticity in a spiking neuron network. A plasticity mechanism may be configured for example based on a similarity measure between post-synaptic activities of two or more neurons that may be receiving the same feed-forward input. The similarity measure may comprise a dynamically determined cross-correlogram between the output spike trains of two neurons. An a priori configured similarity measure may be used during network operation in order to update efficacy of inhibitory connections between neighboring neurons. Correlated output activity may cause one neuron to inhibit output generation by another neuron thereby hindering responses by multiple neurons to the same input stimuli. The inhibition may be based on an increased efficacy of inhibitory lateral connection. The inhibition may comprise modulation of the pre synaptic portion the plasticity rule based on efficacies of feed-forward connection and inhibitory connections and a statistical parameter associated with the post-synaptic rule.

A system for independent component analysis includes a feedback mechanism based on a plasticity rule, and an electro-kinetic induced particle chain, wherein the feedback mechanism and the electro-kinetic induced particle chain is utilized to extract independent components from a data set or data stream. The electro-kinetic induced particle chain is generally composed of a plurality of interconnected nanoconnections (e.g., nanoparticles) disposed between at least two electrodes in a solution, including for example one or more pre-synaptic electrodes and one or more post-synaptic electrodes. The feedback mechanism generally provides feedback to one or more particles within the electro-kinetic induced particle chain, while the plasticity rule can be non-linear in nature. The feedback mechanism also provides for one or more evaluate phases and one or more feedback phases.

According to embodiments of the invention, a system, method and computer program product producing spike-dependent plasticity in an artificial synapse. In an embodiment, a method includes: receiving a pre-synaptic spike in an electronic component; receiving a post-synaptic spike in the electronic component; in response to the pre-synaptic spike, generating a pre-synaptic pulse that occurs a predetermined period of time after the received pre-synaptic spike; in response to the post-synaptic spike, generating a post-synaptic pulse that starts at a baseline value and reaches a first voltage value a first period of time after the post-synaptic spike, followed by a second voltage value a second period of time after the post synaptic spike, followed by a return to the baseline voltage a third period of time after the post-synaptic spike; applying the generated pre-synaptic pulse to a pre-synaptic node of a synaptic device that includes a uni-polar, two-terminal bi-stable device in series with a rectifying element; and applying the generated post-synaptic pulse to a post-synaptic node of the synaptic device, wherein the synaptic device changes from a first conductive state to a second conductive state based on the value of input voltage applied to its pre and post-synaptic nodes, wherein the resultant state of the conductance of the synaptic device after the pre- and post-synaptic pulses are applied thereto depends on the relative timing of the received pre-synaptic spike with respect to the post synaptic spike.

The invention discloses a bionic synaptic device and a manufacturing method and application thereof. Specifically, the invention relates to the bionic synaptic device with spike-time-dependent plasticity learning behaviors. The bionic synaptic device includes a gate electrode (2), wherein the square resistance of the gate electrode is 30 to 800 omega. The gate electrode is used as the synaptic front end of the bionic synaptic device. The device further includes a gate dielectric layer (3) which comprises a solid electrolyte with a proton conductive property, a channel (4), wherein the channellayer is used as the synaptic rear end of the bionic synaptic device. The device further includes a source (5a) and a drain (5b). According to the bionic synaptic device, different linear spike-time-dependent plasticity learning behaviors can be realized on a single device; the circuit design is greatly simplified; and the device has important application prospects in the fields of neuromorphic devices, artificial intelligence and the like.

The invention relates to an STDP-based pulse neural network handwritten Chinese character recognition method, which comprises the following steps of S1, downloading an offline data set, i.e., an offline handwritten Chinese character data set; S2, preprocessing the offline data set: performing normalization processing on each picture in the data set; S3, determining the number of neurons for training; S4, constructing a network structure; S5, performing pulse coding on each pixel in the neural network; S6, determining a neuron model; S7, learning the neuron model by adopting an STDP learning rule; S8, putting the data sets into the network in sequence for training, and completing the training of the pulse neural network after iterating for three times. The recognition method can improve therecognition efficiency of the handwritten Chinese characters. An STDP learning mechanism adopted in the invention exists in conoid neurons of hippocampus at the earliest, and the relative timing sequence of pulse distribution before and after synapsis induces different synapsis change processes, so that the membrane potential of neurons is influenced.

A synaptic integration circuit for a neuromorphic chip comprising a resistive memory synapse which has an activation terminal to receive a presynaptic action signal and a propagation terminal intended to be connected to the circuit for transmitting a synaptic output signal which depends on the resistance of the memory. The circuit comprises an accumulator of the synaptic output signal, a comparator configured to emit a postsynaptic spike in case of the crossing of a threshold (Vm) by the accumulated output signal. It further comprises a control unit configured, when a presynaptic action signal is applied on the activation terminal, to impose a conductance modification voltage on the synapse by controlling the application of a postsynaptic action signal (VBL<sub2>set< / sub2>, VBL<sub2>reset< / sub2>) on the propagation terminal.

A neuron circuit performing synapse learning on weight values includes a first sub-circuit, a second sub-circuit, and a third sub-circuit. The first sub-circuit is configured to receive an input signal from a pre-synaptic neuron circuit and determine whether the received input signal is an active signal having an active synapse value. The second sub-circuit is configured to compare a first cumulative reception counter of active input signals with a learning threshold value based on results of the determination. The third sub-circuit is configured to perform a potentiating learning process based on a first probability value to set a synaptic weight value of at least one previously received input signal to an active value, upon the first cumulative reception counter reaching the learning threshold value, and perform a depressing learning process based on a second probability value to set each of the synaptic weight values to an inactive value.

Methods and apparatus are provided for implementing delays in an artificial nervous system. Synaptic and / or axonal delays between a post-synaptic artificial neuron and one or more pre-synaptic artificial neurons may be accounted for at the post-synaptic artificial neuron. One example method for managing delay between neurons in an artificial nervous system generally includes receiving, at a post-synaptic artificial neuron, input current values from one or more pre-synaptic artificial neurons; accounting for delays between the one or more pre-synaptic artificial neurons and the post-synaptic artificial neuron at the post-synaptic artificial neuron; and determining a state of the post-synaptic artificial neuron based at least in part on at least a portion of the input current values, according to the accounting.

A neuromorphic device is provided. The neuromorphic device may include a pre-synaptic neuron, a row line extending from the pre-synaptic neuron in a row direction, a post-synaptic neuron, a column line extending from the post-synaptic neuron in a column direction, and a synapse at an intersection region between the row line and the column line. The synapse may include a switching device and a memristor electrically connected with each other in series. The post-synaptic neuron may include a summation circuit, a variable resistor, and a comparator.

A neuromorphic device may include: a pre-synaptic neuron; a plurality of post-synaptic neurons; and a plurality of synapses electrically connected to the pre-synaptic neuron and electrically connected to the plurality of post-synaptic neurons. Each of the post-synaptic neurons may include: an integrator; a main comparator having a first input port connected to an output port of the integrator; and a first sub comparator having a first input port connected to the output port of the integrator.

The invention discloses a STDP pulse design method based on a multi-value memristor and an implementation method of diversified STDPs. According to the pulse design method, a synaptic pre-pulse and asynaptic post-pulse are designed into triangular waves with the same waveform, the selecting of the amplitude values of the triangular waves and the time interval of the front and rear triangular waves is determined by the amplitude value of the tested pulse and the pulse width threshold response range, and the pulse design of the STDP synaptic plasticity is simplified. According to the implementation method of the diversified STDP synaptic plasticity, different resistance states are selected as initial resistance states, and the design pulses are superposed on and applied to the memristor, sothat the STDP synaptic plasticity of the biological index attenuation type and the STDP synaptic plasticity different from the biological index attenuation type are realized, thereby realizing diversification of STDP synaptic plasticity. The method is expected to be applied to any kind of multi-value memristor and further expands the application of the memristor in the calculation of artificial synapse and nerve morphology.

The invention aims at the special requirement of the memristor as the electronic component of the processor, presents a neuron and neuron circuit based on the memristor of brain-like device, which canrealize the signal storage and processing similar to human neuron cell, and its single neuron cell can be extensively connected with hundreds of memristors, which provides a very feasible circuit design way for the large-scale use of memristors. In combination with other types of electronic devices such as CMOS tubes, a selector, a nanowire, and pulse design, the invention creatively solves the polysynaptic connection in biology of neuron cell designed by memristor as the core device of processor, forward stimulation, backward stimulation, nuclear storage, synaptic front-end, protruding back-end and other biological design issues, to achieve (forward and backward) signal processing within neurons and transmission between neurons, and build the corresponding neuronal cells and neural network circuits.

The present invention provides a combined therapy for treating loss of GABA-mediated pre-synaptic inhibition after spinal injury. The therapeutic regimen includes spinal segment-specific upregulation of GAD65 (glutamate decarboxylase) gene and administration of a GABA uptake inhibitor to modulate chronic spasticity in patients after spinal traumatic or ischemic injury.

The invention relates to the field of medicine, and discloses a novel application of 3-methoxyl mangiferin in the field of pharmacy, and a medicine composition comprising 3-methoxyl mangiferin. 3-methoxyl mangiferin can promote hippocampus dentate gyrus neuron 5-hydroxytryptamine 1A receptor gene and protein expressions, and can induce neurotrophic effects such as hippocampus remodeling performed by 5-hydroxytryptamine. Therefore, post-stroke hippocampus nerve aregeneratory can be substantially ameliorated, 5-HT re-uptake of nerve presynaptic membrane can be selectively inhibited, 5-HT positive cell expression at hypothalamus can be reduced, exhaustion of 5-HT can be relieved, and anxiety and depression symptoms caused by 5-HT exhaustion can be relieved. Therefore, 3-methoxyl mangiferin can be used in preparing medicines used for treating post-stroke depression.

An unsupervised learning method is provided implemented in an artificial neural network based on memristive devices. It consists notably in producing an increase in the conductance of a synapse when there is temporal overlap between a pre-synaptic pulse and a post-synaptic pulse and in decreasing its conductance on receipt of a post-synaptic pulse when there is no temporal overlap with a pre-synaptic pulse.