704 results about "Path delay" patented technology

Disclosed are new calculations of packet loss bursts, packet re-ordering, and an indication of relative alternate network path delay metrics, based upon differences between received and expected packet sequence numbers, for determining packet network performance.

An audio/video system comprises an audio signal processing path having an audio path delay and a video signal processing path having a video path delay. The audio path delay may be different from the video path delay. The audio path delay and/or the video path delay may change, for example because of replacement of a component within the audio signal processing path or the video signal processing path. Delay matching (synchronization) in the audio/video system comprises adjusting the audio path delay to be substantially equal to the video path delay. Matching the audio path delay to the video path delay generally includes adding delay to the signal processing path with the lesser delay.

A method and an apparatus for enabling a digital wireless service across a first and a second wireless communications environment is provided. The method comprises translating a receive signal carried on a forward link and having a first carrier frequency in the first wireless communications environment from a first frequency band to a second frequency band different from the first frequency band. The method further comprises translating a transmit signal carried on a reverse link and having a second carrier frequency in the first wireless communications environment from the second frequency band to the first frequency band. In this way, a digital wireless service may be provided between a mobile station and at least one base station on the ground across two different wireless communications environments. The method further comprises compensating Doppler shift separately for individual beams directed at a plurality of terrestrial base stations. The method further comprises injecting an additional path delay to insure that the terrestrial base stations receive reverse link signals at substantially similar round trip time offsets and to reduce search windows for the terrestrial base stations. In this way, a wireless communication system may enable in-flight use of a mobile station to communicate with one or more base stations on the ground.

A scan-based BIST architecture for detecting path-delay faults in a sequential circuit converted to a combinational circuit or a less complex sequential circuit including a combinational portion and a plurality of scan flip-flops. The BIST structure includes a test pattern generator for generating two test patterns and a controller for generating a clock signal and an extended scan mode signal which is held high for two clock cycles while the output response of the combinational portion to the first and second test vectors is latched into the scan flip-flops in order to detect a signal transition. The invention is further directed to a method for detection of path-delay faults using this scan-based BIST architecture. To improve the fault coverage for path-delay faults, observation points may be inserted at the inputs of selected scan flip-flops. A predetermined number of scan flip-flops having the highest activation frequency are selected as the observation points.

A system abstracts channel information from field data gathered in actual wireless communication system environments. The abstracted data is then transformed into control signals or programming codes that can be used to control channel simulators so as to recreate the field conditions, including path loss, slow fading, fast fading, path delay, fading power spectral density with and without line-of-sight (LOS), and different kind of handoff scenarios, such as soft, softer, intra-band hard, inter-band hard handoffs. The system thus can accurately simulate a realistic wireless communication link originated from multiple signal sources in different band channels and formed by multipath signal propagation. The simulated realistic wireless communication link can be condensed by selecting the most useful scenarios from its original field data files or modified by tuning its parameters as desired.

A system for stabilizing a delay through a signal path of an integrated circuit (IC) includes an oscillator for producing a periodic first reference signal, a delay circuit for delaying the first reference signal to produce a periodic second reference signal, and a loop controller for adjusting the magnitude of the IC's power supply so as to maintain a constant phase difference between the first and second reference signals. By adjusting the power supply magnitude, the loop controller also stabilizes signal path delays through logic circuits implemented in the IC. The oscillator is formed by a logic gate implemented in the IC and a passive delay line feeding the logic gate's output back to its input. The delay of the delay circuit is programmably adjustable to allow for adjustment of the signal path delay through the IC.

A burst-mode differential phase shift keying (DPSK) communications system according to an embodiment of the present invention enables practical, power-efficient, multi-rate communications between an optical transmitter and receiver. An embodiment of the system utilizes a single interferometer in the receiver with a relative path delay that is matched to the DPSK symbol rate of the link. DPSK symbols are transmitted in bursts, and the data rate may be varied by changing the ratio of the burst-on time to the burst-off time. This approach offers a number of advantages over conventional DPSK implementations, including near-optimum photon efficiency over a wide range of data rates, simplified multi-rate transceiver implementation, and relaxed transmit laser line-width requirements at low data rates.

According to the present invention, methods and apparatus are provided for determining components of a round trip time (RTT). A source node sends data to a destination node. The destination node inserts a timestamp into an acknowledgment and sends the acknowledgment back to the source node. The source node determines the RTT from its own measurements and estimates reverse path delay by comparing timestamps to expected timestamps. Considerations for destination node timestamp speed differences are provided.

A semiconductor memory device is capable of stably securing an on-die-termination (ODT) latency in spite of PVT variations and various operating speeds. The semiconductor memory device includes a plurality of termination resistors connected to an output pad in series and parallel, a drive controller, a delay path, and a delay control signal generator. The drive controller activates/inactivates the plurality of termination resistors in response to a driving control signal. The delay path delays a termination command by a delay time corresponding to an on-die-termination (ODT) latency to output the driving control signal, wherein the termination command is converted into a delay locked loop (DLL) clock domain signal. The delay control signal generator controls a conversion point of the termination command into the DLL clock domain signal.

Method and apparatus are described for improving information transfer over USB. In one approach, hub-based extension is realized wherein power is distributed using auxiliary wiring distinct from signal and power wiring present in conventional USB cabling. Additional signals allow optimization of power distribution for powering attached devices, and for detecting and handling illegal connection configurations. In another approach, improvements are realized through use of alternative signaling techniques which eschew reflective and high-speed common-mode signaling. Described are various configuration, media and signal-protocol combinations, including implementations containing embedded hubs. Methods ensuring reliable system behavior are also described, including determination of extension path delay and use of topology-enforcement hubs. In other approaches, further improvements are realized by allowing information exchanges to take longer than the nominal timeout period, or by allowing host requests to be delayed for transmission until the extended bus is available for use.

This invention synchronizes the sample clocks of an entire wireless network from a single central base station. Unlike a conventional digital radio network where every terminal must have a synchronization circuit in its receiver to adjust the sample clock, each of the radio terminals in this network is clocked from an independent free-running oscillator. For each terminal, the base station learns the frequency and phase of the oscillator by exchanging a special set of signals: first a vernier signal to determine the initial time and frequency offset, and then an early-late signal to track changes in the oscillator. Once the base station is synchronized to the terminal's oscillator, it can determine the absolute path delay between itself and the terminal and correct for the delay using an equalizer. Signals received from the terminal are corrected after the signal arrives at the base station. Signals sent to the terminal are corrected within the base station before they are transmitted so they arrive at the terminal at the precise time that the terminal's free running oscillator takes a sample.

The invention relates to a method for realizing sub-microsecond synchronization accuracy based on a PTP (Precision Time Protocol), belonging to the technical field of communication; in order to obtain high-accuracy synchronization efficiency and save hardware investment cost, the method comprises the following steps: before a master time sends synchronization messages, synchronizing a clock and a clock source of an Ethernet transceiver; obtaining average path delay of links by a delay request information packet delay measuring mechanism or measuring a waiting delay information packet delay measuring mechanism; and performing asynchronous correction on the links so as to realize sub-microsecond synchronization accuracy. In the method, the DP83640 Ethernet transceiver is adopted, network message time stamp can be exactly obtained, the PTP protocol on an AT91RM9200 platform is realized, and sub-microsecond synchronization accuracy can be realized. Via test, the synchronization accuracy can be up to 100ns; and the whole system is low in cost, excellent in openness and expandability, and easy to implement.

A call processing method and system in which the use of the MGW between the RNC and the peer party is limited to only certain situations. This invention uses RFC 3267 (AMR/IETF) on the RNC. This will avoid inserting a MGW context for framing conversion only. This invention provides an optimization that sets up calls from the RNC, thus avoiding the need for a MGW in the path for basic calls. With this optimization, the usage of DSP and packet resources and the number of MGW chassis, as well as bearer path delay, are all reduced.

There is provided a radio communication device having a high quality and accuracy regardless of fluctuation degree of the transmission path characteristic. The radio communication device estimates the fluctuation speed of the transmission path characteristic from the time correlation of the reception signal, judges the diversity technique used between the communication devices from the estimated value, and feeds back the judgment information so as to switch the diversity between the communication devices, thereby increasing the diversity gain. The feedback information is minimized by defining a correspondence table. Moreover, diversity switching is performed at a timing considering a control delay and a propagation path delay so as to prevent an instantaneous disconnection of the communication.