61 results about "Numeral system" patented technology

Methods for using genetic marker genotype (e.g., gene sequence diversity information) to improve the process of developing plant varieties (e.g., single cross hybrids) with improved phenotypic performance are provided. Methods for predicting the value of a phenotypic trait in a plant are provided. The methods use genotypic, phenotypic, and optionally family relationship information for a first plant population to identify an association between at least one genetic marker and the phenotypic trait, and then use the association to predict the value of the phenotypic trait in one or more members of a second, target population of known marker genotype. Methods for identifying new allelic variants affecting the trait are also provided. Plants selected, provided, or produced by any of the methods herein, transgenic plants created by any of the methods herein, and digital systems for performing the methods herein are also provided.

Disclosed is a method of browsing a collection of sortable items (201) stored in a digital system. A plurality of grouping hierarchies (207, 217) are provided, each comprising a sort order and zero or more grouping levels (204-206, 214-216) forming groups with which the items are associable. At least one grouping hierarchy comprises a sort order and at least one grouping level. One item (203) in the collection is set to be a focus item (208, 218) thereby establishing a current focus group (209, 219) of a current grouping hierarchy. The focus item is then maintained upon selection of a new grouping hierarchy (210-220) from one of the plurality. A displaying of the collection of items may be performed by arranging the items in a list sorted according to one sort order of a plurality of sort orders associable with the items. The plurality of grouping hierarchies may then be used, each grouping hierarchy corresponding to one of the sort orders, wherein each level of each grouping hierarchy is associable with at least one level of each other grouping hierarchy. At least part of the collection is the displayed based upon the one sort order of items represented and the corresponding one grouping hierarchy.

A cryptographic system (CS) is provided. The CS (500) is comprised of a data stream receiving device (DSRD), a chaotic sequence generator (CSG) and an encryptor. The DSRD (602) is configured to receive an input data stream. The CSG (300) includes a computing means (3020, . . . , 302N-1) and a mapping means (304). The computing means is configured to use RNS arithmetic operations to respectively determine solutions for polynomial equations. The solutions are iteratively computed and expressed as RNS residue values. The mapping means is configured to determine a series of digits in the weighted number system based on the RNS residue values. The encryptor is coupled to the DSRD and CSG. The encryptor is configured to generate a modified data stream by incorporating or combining the series of digits with the input data stream.

Pre-packaged multi-step skin care systems are disclosed wherein numerous products are bundled together that provide skin health benefits along the skin care continuum. The products, which can be wet wipes, are marked in such a manner as to instruct the user as to the preferred sequence of use of the products to attain maximum benefit therefrom. The products may be marked with a numeric system, an alpha numeric system, a word system, and / or a coloring system to instruct the user.

A PBX (10) is connected to a mobile telephony network (40) via a PSTN (20) and via a LAN (90) and data network (30). A mobile telephone (50) served by the mobile network, has a separate data channel (100). The invention describes a way to integrate mobile telephones as extensions of the PBX and to provide them with functionality similar to that of a wired digital PBX system telephone (70). The data channel of the mobile telephone is used to give the PBX access to the user interface devices of the telephone. The speech path between the PBX and the mobile telephone may be set up in the direction from the PBX to the mobile telephone, even when the call was initiated at the telephone. The invention relies only on the basic voice and data communications services of the mobile telephony network, and therefore provides independence from the network operator.

A serializer and a deserializer are disclosed and shown operating singly or as a pair. The invention operates independently from any outside system reference clock. The inventive system provides an internal bit clock that serializes the data when sending and de-serializes the data when receiving. A bit clock or pulse travels with the data word bits to define when a bit is stable. The system uses word boundary bits operating with a bit clock to distinguish different data words, as described in the parent application. The system operates either synchronously or asynchronously with the base computer or other such digital system, including I / O devices. The invention finds use where new data to be sent is strobed into the serializer, but also where a change in the data bit content itself will cause the changed data to be loaded into the serializer and sent bit by bit. The system operates where new data is strobed or loaded by the serializer (not the base computer system) when the last data word has been sent. In this case a signal is generated when the last word has been sent in the serializer that causes new data to be loaded for sending. Half duplex and full duplex configurations as disclosed. Similar, corresponding operations occur at the deserializer.

In at least one hardware definition language (HDL) file, at least one design entity containing a functional portion of a digital system is specified. The design entity logically contains a latch having a respective plurality of different possible latch values. With one or more statements in one or more files, a configuration entity is associated with the latch. The configuration entity has a plurality of different settings and each setting reflects which of the plurality of different possible values is loaded in the associated latch. A controlling value set for at least one instance of the configuration entity is also defined in one or more files. The controlling value set indicates at least one controlling value for which presentation of a current setting of the configuration entity instance is restricted. Thereafter, in response to a request to present at least a partial state of the digital system, a current setting of the configuration entity instance is excluded from presentation by reference to a configuration database indicating the controlling value set.

The present invention relates to the design of essentially digital systems and components. In one embodiment, a parameterized model of a sub-component of an essentially digital system is provided. This sub-component is used in components of the system, e.g. interconnect at the different levels (up to the packaging level) and includes all relevant parameters with their physical constraints. If certain parameters do not play a significant role at the system level exploration, they can be left out of the exploration. But then they should preferably be fixed on the value that allows the cheapest and most reliable process technology solutions (independent of their delay or energy consequences). For the parameters that do have a large impact, the subranges of their trade-off curves, especially Pareto curves, that are appropriate for a given target domain (e.g. ambient multimedia) should be carefully selected to match design cost, process cost and reliability issues.

In a hardware definition language (HDL) file among one or more files, one or more design entities containing a functional portion of a digital system are specified. The one or more design entities logically contain a plurality of latches having a respective plurality of different possible latch values that each corresponds to a different configuration of the functional portion of the digital system. With one or more statements in the one or more files, a multi-level Dial tree is defined that includes a selective control Dial (SCDial) entity at an upper level that is associated with at least one design entity. The SCDial entity has a Dial input, a plurality of Dial outputs coupled to inputs of the plurality of lower level Dials, and a mapping table indicating a mapping between each of a plurality of possible input values of the Dial input and a respective one of a plurality of sets of output values for the plurality of Dial outputs. At least one set of output values in the mapping table specifies output values for fewer than all of the plurality of Dial outputs. Each specified output value reflects a setting of at least one lower level Dial, and settings of the lower level Dials reflect which of the plurality of different possible configuration values is loaded in the plurality of configuration latches.

The invention relates to improving the performance of DVC systems using a differential adaptive-base representation of video data to be transmitted, wherein frame data are truncated to the least significant digits in a base-B numeral system, wherein the base B is adaptively determined at the DVC receiver based on a side information error estimate.

A secure digital system including a number of ICs that exchange data among each other. Each of the ICs includes a key generator for generating a cipher key; a memory for securely storing the generated cipher key; an authenticating module for authenticating neighboring ICs of a respective IC; an encryption module for encrypting data communicated from the respective IC to the neighboring ICs; and a decryption module for decrypting data received from the neighboring ICs.

The invention belongs to the field of the mechanical processing, in particular to a follow measurement method for roundness of a crankshaft pin, which is characterized in that a measuring head is arranged on a grinding carriage guide rail, and the vertical plane of the measuring head leans tightly against the external surface of the crankshaft pin to be measured; a crankshaft pin specimen is selected, and an on-line measurement roundness error at various angles of the connecting rod journal specimen is measured on line; the actual roundness error is deducted from the measured roundness error of the specimen so as to obtain fixed roundness error of the measuring system; the data about the fixed roundness error are input into the measuring system, the workpieces are arranged, and the actual roundness error of the connecting rod journal workpiece can be obtained by automatically subtracting the fixed roundness error of the workpiece from the measuring roundness error of the workpiece, and the numeral system carries out another machining to eliminate the workpiece roundness error, according to the correction program data of the actual roundness error of the workpiece. The follow measurement method of the invention adopts single-point measurement, thus having the advantages of simple structure, convenient measurement, being scientific and rational and having good economy.

A method of optimising a digital test signal for testing an analogue or mixed-signal circuit comprising determining a measure, for example a figure of merit, that is indicative of differences between the output of a fault free and the output of a known faulty circuit in response to an applied digital input signal. The digital input signal is then varied and another figure of merit is calculated for the fault free and the known faulty circuit for the new input signal. This is repeated a number of times, the digital input signal being varied each time. An optimum test signal is selected based on the determined figures of merit.

According to a method of simulation processing, one or more HDL source files describing a digital design including a plurality of hierarchically arranged design entities are received. The one or more HDL source files include one or more statements instantiating a plurality of print events within the plurality of hierarchically arranged design entities, where each print event has an associated message and at least one associated signal in the digital design. The one or more HDL source files are processed to obtain a simulation executable model including a data structure describing the plurality of print events defined for the simulation executable model and associating each of the plurality of print events with its respective associated signal.

A lighting system with a digital micromirror device which forms a digital godo system that is controllable on a pixel level. The device includes a number of sensitive electronic elements. The device is controlled by two different controllers: a digital signal processor which is effectively the number crunching portion, and a controller, which controls the functions of the light. The controller also logs errors into a registery, such as a non-volatile memory. A field programmable gate array is used for a number of purposes, including to form the ports. One of those ports is a tech port, which is used to detect status of the light such as faults.

A method includes providing a plurality of variables and a variable. The variables differ from each other. The variables differ from the variable. The further method includes providing a lookup table indexing a plurality of characters via a plurality of values based on a first numeral system, converting a message into a first sequence of values based on the table, converting the first sequence into a second sequence of values based on a second numeral system different from the first system and according to a preset format, combining the second sequence into a single sequence via removing the format, generating a first plurality of subsequences from the single sequence based on segmentation of the sequence via alternating the variables, converting the first subsequences into a second plurality of subsequences such that each of the second subsequences is sized according to the variable, and transmitting the second subsequences.

In at least one hardware definition language (HDL) file, at least one design entity containing a functional portion of a digital system is specified. The design entity logically contains a configuration latch having a plurality of different possible configuration values that each corresponds to a different configuration of the functional portion of the digital system. With a statement in the HDL file(s), a Dial entity is associated with the at least one design entity. The Dial has a Dial input, a Dial output, a mapping table indicating a mapping between each of a plurality of possible input values that can be received at the Dial input and a respective corresponding output value for the Dial output, a phase ID and a default input value among the plurality of possible input values. The output value of the Dial entity controls which of the different possible configuration values is loaded in the configuration latch and the phase ID indicates a phase during which the default input value is to be applied.

In one embodiment, it is proposed a method for storing input data on a set of DNA strands, said input data being represented in a numeral system. This method is remarkable in that it comprises: formatting said input data into a set of blocks of data, each block of data having a size inferior to a size of one DNA strand; applying a first encoding with an erasure code on said set of blocks of data, defining a first set of modified blocks of data, each modified block of data having a size inferior to a size of one DNA strand; applying a second encoding using an error correcting code on each modified block of data of said first set, defining a second set of modified blocks of data, each modified block having a size inferior to a size of one DNA strand; encoding each modified block of data of said second set into a nucleotides block sequence; generating a set of DNA strands, each DNA strand comprising a nucleotides block sequence obtained through said encoding.

The present invention relates to the field of software development for special purpose computers or digital system, and in particular, provides systems and methods for generating executable code for a target special purpose system from a general purpose computer language not specifically directed to the special purpose system. In a preferred embodiment, first, general purpose language source code is compiled to an intermediate language, such as Java byte-code; second, the intermediate language is translated to a special purpose language implemented for the special purpose system, often the C language or a variant; and third, the translated special purpose language is compiled into executable code for the special purpose system. Additional embodiments include systems performing these software development methods and related program products and / or computer-readable media.

In one embodiment, it is proposed a method for storing input data on a set of DNA strands, said input data being represented in a numeral system. This method is remarkable in that it comprises: formatting said input data into a set of blocks of data, each block of data having a size inferior to a size of one DNA strand; applying a first encoding with an erasure code on said set of blocks of data, defining a first set of modified blocks of data, each modified block of data having a size inferior to a size of one DNA strand; applying a second encoding using an error correcting code on each modified block of data of said first set, defining a second set of modified blocks of data, each modified block having a size inferior to a size of one DNA strand; encoding each modified block of data of said second set into a nucleotides block sequence; generating a set of DNA strands, each DNA strand comprising a nucleotides block sequence obtained through said encoding.

A digital system employing a multi-channel and multi-level PWM technique that allows for smoother transitions in the outputs of the multiple channels in response to variations in the level of a digital input signal. The system generates PWM and other digital control signals to control switching circuitry included in the multiple channels, in which the PWM control signals are generated from a number of LSBs of the digital input signal, and the other digital control signals are generated from the remaining MSBs of the digital input signal. The system provides selected ones of the PWM and other digital control signals to each channel for controlling the switching circuitry included therein. By providing both the PWM and the other digital control signals to the multiple channels in an interleaved manner, smoother transitions in the outputs of the various channels can be achieved, thereby reducing the occurrence of unwanted transients in the system output.

A method for interpolating pixel colors in a digital system is provided. The method comprises obtaining at least two pixels of a first color having a first level of similarity, wherein the at least two pixels are positioned adjacent a first pixel to be restored; calculating average values of the two pixels for the first color; restoring the value of the at least two pixels for the first color; and restoring a value associated with a second color for the at least two pixels by an interpolation method using a gradient of a brightness.

A password and / or email address management platform configured to regenerate a previously generated password for a given web domain or digital system without permanently storing the previously generated password. The platform can operate without maintaining a permanent store or list of other user-related information, e.g. a list of web domains or systems for which passwords have been generated. In an embodiment, the platform performs the steps of concatenating a plurality of password input data elements into a requested phantom password input data string, applying a hashing algorithm to the requested phantom password input data string to generate a phantom password hash, applying a hash-to-string function to convert the phantom password hash to a phantom password, and purging the password generation system of the phantom password after it is notified to a user.

Navigation satellite receivers have a large number of channels, where phase discriminators and loop filter of a PLL operate in phase with data bits and control of numerically controlled oscillator (NCO) carried out simultaneously on all channels. Since symbol boundaries for different satellites do not match, there is a variable time delay between the generation of control signals and NCO control time. This delay may be measured by counting a number of samples in the delay interval. A proposed system measures non-energy parameters of the BPSK-signal carrier received in additive mixture with noise when a digital loop filter of PLL controls NCO with a constant or changing in time delay. A control unit controls bandwidth and a LF order by changing transfer coefficients based on analyzing estimated signal parameters and phase tracking error at a PD output.

The present invention relates to a transmitting / receiving device for easily inputting a unique identification ID for communications by using one or two digit input units, which refers to a hand-operated switch, a sensing unit of a touch pad or a touch screen, in such a manner that each digit of ID in a decimal / hexadecimal positional notation is inputted to an input port of a microcontroller by repeating toggle operation of the digit input unit n times to input a digit value n as decimal / hexadecimal value, and position of the digit to be inputted is changed by means of that for a predetermined time the digit input unit is operated or not operated, and a microcontroller or the like calculates an communication device ID by means of the combination of inputted digits and position changes according to principles of the positional notation.

In at least one hardware definition language (HDL) file, at least one design entity containing a functional portion of a digital system is specified. The design entity logically contains a latch having a respective plurality of different possible latch values. With one or more statements in one or more files, a configuration entity is associated with the latch. The configuration entity has a plurality of different settings and each setting reflects which of the plurality of different possible values is loaded in the associated latch. A controlling value set for at least one instance of the configuration entity is also defined in one or more files. The controlling value set indicates at least one controlling value for which presentation of a current setting of the configuration entity instance is restricted. Thereafter, in response to a request to present at least a partial state of the digital system, a current setting of the configuration entity instance is excluded from presentation by reference to a configuration database indicating the controlling value set.

Methods and associated hub arrangements are described for use in diagnosis and recovery in high performance digital loops such as, for example, those seen in Fibre Channel systems. In one system having a hub configured for interconnection of a plurality of stations as part of a digital system such that digital data flows between the stations based on operational status of the system, an arrangement forms part of the hub which arrangement is connectable at points within the hub and between at least two different pairs of the stations for monitoring certain characteristics of the data in a way which provides for non-invasive identification of one or more conditions related to the operational status of the system.

Line drawing techniques that employ runs or runs of runs of pixels to draw the line compute line structure information that they use to determine the sequence of runs in the line. This line structure information may be used in other ways to enhance the line drawing operation. One of the ways is to use the line structure information to compute the positions of a plurality of the runs and then draw the runs in parallel. Another way is to use the line structure information to determine properties of sets of cells that include not only cells of the run, but additional cells that are affected by the presence of the cells of the run. One example of such sets of cells is the cells of the run plus anti-aliasing cells. The line structure information can be used to determine the location and size of a set of cells and the intensities of the anti-aliasing cells. Another example of such sets of cells are cells that are written together in a single memory operation. The sets of cells may be drawn in parallel in the same fashion as the runs.