184 results about "Host adapter" patented technology

A computer system including an error recovery system establishes error threshold inversely proportional to the number of a like kind of system resources, such as host adapters. When a host adapter is initialized or deactivated, a software subcomponent of a processing device calculates a new threshold number and writes it to a memory location associated with each host adapter. When a number of errors exceeds the threshold number, the host adapter is reset, quiesced for repair, or fenced for replacement.

A fabric-attached device configuration for a host system may be managed in regard to fabric state changes for a host system connected to a fabric. An event may be received indicating a fabric state change for one or more host adapter ports. In response to the event, the host system's fabric device configuration may be dynamically changed. Dynamically changing the host system's fabric device configuration may include bringing online or taking offline one or more fabric devices for the one or more host adapter ports for the host system. In some embodiments, a configuration file may be stored specifying an action to be taken for various types of events. Upon receiving indicating a fabric state change, the configuration file may be accessed to determine the fabric device configuration action to be taken for the type of fabric state change indicated by the event.

An optical transceiver is provided that includes a transceiver substrate arranged substantially perpendicular to longitudinal axes respectively defined by a transmit optical subassembly and receive optical subassembly. The transceiver substrate is configured to electrically and physically connect to the transmit optical subassembly and the receive optical subassembly, and includes a connector configured and arranged to interface with a host bus adapter. The combination of the host bus adapter and optical transceiver is sized and configured to be received within a standard slot of a host system, such as a PCI or PCMCIA slot. In this way, one or more optical connections are integrated within the host device or system.

Method and system for an adapter coupled to a network via a network link is provided. The method includes using a first selectable mode and a second selectable mode to provide quality of service to a plurality of applications executed by one or more computing system. In the first selectable mode, the quality of service is based on allocating bandwidth of the network link and dynamically adjusting an initial priority assigned to a plurality of queues, each queue being associated with an application from among a plurality of applications. In the second selectable mode, the quality of service is based on a user assigning a priority to each of the plurality of applications and the adapter determines a number of input / output (I / O) requests it needs to process within a duration and then transfers information based on the determined number of I / O requests and the assigned priority.

Method and system for optimizing DMA request processing is provided. The system includes a HBA that uses a dynamic DMA maximum write burst count sizing to optimize processing of write and read requests, wherein the HBA includes a DMA optimizer module that selects a certain write burst size to adjust performance when read and write DMA requests are being utilized. The DMA optimizer module can toggle between write and read request priority based on a maximum write request burst size. A shorter maximum write burst size provides more opportunity to issue read requests and a larger maximum burst size provides a better write request performance. The method includes, evaluating a read request throughput rate; evaluating a write request throughput rate; evaluating a read request utilization rate; evaluating a write request utilization rate; and adjusting a maximum write burst size.

A method for determining a change in the SAF-TE enclosure status and a change in the SAF-TE device slot status, each with a single issuance of one new command, replacing countless re-issuance of similar commands. Use is made of a common disconnection / reconnection capability as well as a tagged command queuing technique, such that multiple types of status changes in a SAF-TE enclosure are concurrently determined. Since each of the new commands described here is initiated by the host adapter, the host adapter is prepared for receiving asynchronously a changed status from the reconnecting target device such as a SEP whenever it becomes available, without resorting to use of a complex SCSI protocol known as “asynchronous event notification.” Status fields in the data packets transferred by the commands introduced in this invention may be the same as those in conventional systems, and so the inventive commands are a natural extension to conventional systems and may be adapted while maintaining compatibility with existing hardware and protocols. Removes stringent SEP response time requirements and causes negligible host system performance impact independent of how many SAF-TE enclosures are attached to the host adapter. Provides for use of an optional convenience timer for the SAF-TE Processor (SEP) device to check in with its current status before a status change occurs. Maintains backward compatibility by detection of an absence of the “tagged command queuing” indicator in inquiry data from the SEP device with implementations that do not support the inventive commands. Computer software and firmware implementations are provided.

A CMOS integrated circuit that comprises a graphics controller system that consists of a graphics engine and video memory together with some interface blocks, a PCMCIA host adapter, an infrared interface for generating video images on a LCD or CRT display unit, and a video stream interface for receiving video signals. Since the video memory is integrated on the same integrated circuit as the graphics controller, no package pins are required for the memory interface. The pins thus saved are used to provide access to an on-chip PCMCIA host adapter. The internal memory interface is 128 bits wide. Simultaneous performance improvement and power dissipation reduction is achieved because of the wide memory interface and the elimination of the large parasitic capacitances associated with a package pin connection.

A method and a Fibre Channel switch element are provided that allows communication between a host system and a target device attached to a proprietary switch fabric in a network. The Fibre Channel switch element includes a first port that communicates with the target device through the proprietary switch fabric by logging on behalf of the host system so that the proprietary switch behaves as if it was directly communicating with the host system; and a second port that communicates with the host system and collects host bus adapter (“HBA”) identification information, wherein the HBA identification information is used to map the first port to the second port so that when the host system communicates with the target device the Fibre Channel switch element is transparent to the proprietary switch fabric.

A host adaptor is configured to monitor operation of an optoelectronic transceiver. The host adapter includes a transceiver interface, memory, comparison logic and a host interface. The transceiver interface receives from the optoelectronic transceiver digital values corresponding to operating conditions of the optoelectronic transceiver. The memory includes one or more memory arrays for storing information related to the optoelectronic transceiver, including the digital values received from the optoelectronic transceiver. The comparison logic is configured to compare the digital values with limit values to generate flag values, wherein the flag values are stored in predefined flag storage locations within the memory during operation of the optoelectronic transceiver. The host interface enables a host device to read from host specified locations within the memory, including the predefined flag storage locations, in accordance with commands received from the host device.

An adapter for removably coupling an electronic device to a host and a modular system of the host, adapter and electronic device. The adapter comprises a main body, a first interface capable of coupling with the appliance, a cavity in the main body receiving the electronic device, a second interface within the cavity coupling with the electronic device; and an access panel removably mounted to the main body to selectively close the opening of the cavity.

The present invention relates to a system and method for providing a user access to at least one host computer through a Keyboard, Video, and Mouse (KVM) switch based upon biometric authentication of the user. In one embodiment, a method is provided for permitting a user to access a KVM switch based upon biometric data associated with a user in a single user station environment and a multiple user environment. In another embodiment, a system is provided for permitting a user to access a KVM system in a single and / or multiple user environment based upon biometric data associated with the user. The system further provides for direct coupling of host computers to the KVM switch and / or utilizing host adapters to couple a host computer to an input station. The system is scalable by communicatively coupling a fabric which may include associations with host computers or additional fabrics to the host adapters in order to provide a user a logical connection to a wide assortment of host computers.