54 results about "Allocation Code" patented technology

A method for assigning codes in an uplink of a synchronous code division multiple access (CDMA) telecommunication system is disclosed. The method for assigning a code in a reverse channel of a synchronous wireless telecommunication system, comprising the steps of: a) at a mobile station, receiving time matching information of a scrambling code from a base station; b) at the mobile station, spreading data frame to be transmitted by an orthogonal code, thereby generating a spread data; and c) at the mobile station, multiplying the spread data by a scrambling code based on the time matching information of the scrambling code, thereby generating an encoded data.

A transcoder (40) includes a method for assigning transcoder channel elements (43, 44). The transcoding assignment method selects a DSP (60-75) selects a DSP (channel element) of the required type which has available channel elements (98). Further, the transcoding assignment method may dynamically reassign (118) DSPs from one channel element type to another.

A method and system for downlink channelization code allocation or assignment in a Universal Mobile Telecommunication System (UMTS) are presented. The method and system generate an optimal channelization or Orthogonal Variable Spreading Factor Orthogonal Variable Spreading Factor (OVSF) code to be assigned to a new channel through a route having the minimum influence while maintaining the existing or assigned OVSF codes. The inventive method and system leave reserved codes by managing generation and release of the OVSF codes. This prevents situations where the new channel cannot be assigned an OVSF code due to a lack of OVSF codes, even though there is enough available power and enough available channels.

The invention relates to an image transmission technology, in particular to a code rate control method for stabilizing video quality, which is realized by the following technological measures and comprises the following steps: S1: estimating the complexity of P frame type images or the complexity of I frame type images; S2: obtaining the pre-allocation code rates of k frame images; S3: calculating the quantization parameter QPk of a k frame according to the complexity of the P frame type images and the pre-allocation code rates of the k frame images or the complexity of the I frame type images and the pre-allocation code rates of the k frame images; and S4: coding and regulating the compression ratio by an encoder according to the quantization parameter QPk so as to further control the output code rate of the video. The invention can smoothly control and regulate the video quality and satisfy the video requirements of a large amount of application occasions.

In a computer system having a multithreaded application and a generational garbage collector that dynamically pre-tenures objects from a predetermined number of candidate allocation sites, allocated byte accounting is performed by each application thread using an array that contains a number of entries equal to the total number of candidate sites at any given time. Each array is indexed by a site number assigned to that site and contains a bytes allocated count for that site. At compilation time, object allocation code that is generated by the compiler is modified to update an array entry associated with a site number that is assigned when the site is selected as a candidate site. Since each array is local to the thread that contains it, each thread can write into its array without using atomic operations or locks.

The invention belongs to the technical field of FPGAs and provides an FPGA interconnect resource allocation generation method based on reinforcement learning. Firstly, an interconnect resource model based on the reinforcement learning is constructed, and a state transition matrix and a return function are initialized; then, the state transition matrix and the return function are combined, and according to the interconnect source model, a reinforcement learning training method is adopted to train a strategy; then, a wiring initial state point is set, according to the strategy, allocation traces are finished, and according to the allocation traces, the state transition matrix is updated; finally, the state transition matrix is updated repeatedly until the coverage rate is withdrawn, all allocation traces are summarized and converted to allocation codes, and finally, the interconnect resource allocation is output. According to the FPGA interconnect resource allocation generation method based on the reinforcement learning, by the adoption of a reinforcement learning theory, on the premise that the interconnect resource test coverage rate reaches 100 %, test allocation times are effectively reduced, automatic allocation of the FPGA comprising Global and Local interconnect resources is achieved, the test efficiency is high, and the applicability is good.

The invention discloses a realization method for a dynamic clock based on an embedded WEB-OMT (object modeling technology) page. The method comprises the following steps of: A, sending a page request to a server by a client end; B, downloading a page document including a dynamic clock script from the server by the client end; and C, analyzing HTML (hypertext markup language) tags by the client end, and implementing a JavaScript. The page document comprises a document head and a document body corresponding to the document head, wherein the document comprises a dynamic clock JavaScript, and the document body comprises corresponding HTML allocation codes and JavaScript calling codes. In the technical scheme of the realization method, a pure script is used to realize the dynamic clock, an internal function is mainly used to realize dynamic effect, combined with a trigonometric function, the precise positioning is realized, pictures are not included in a realization form, and the loading time is shortened; and meanwhile the realization form of the adopted codes can be expanded, the maintenance difficulty is small, the flexibility is high, and an intuitive dynamic effect is provided. The realization method for the dynamic clock based on the embedded WEB-OMT page can be widely applied in the technical field of communication.

The present invention relates to an orthogonal spreading code in a code division multiple access (CDMA) mobile communication system, and more particularly, to a method for generating and allocating code or code pairs on the basis of an orthogonal code set, which is generated using orthogonal spreading codes, so as to reduce a peak-to-average power ratio and enlarge the length of an interference free window. In accordance with the invention, at least one orthogonal code set is generated based upon orthogonal spreading codes, one of the at least one orthogonal code set is determined as a representative orthogonal code set, and then the order is allocated according to rules determined based upon the representative orthogonal code set. The codes or code pairs are generated and allocated using the orthogonal spreading codes, so as to reduce a Peak-to-Average Power Ratio or extend the length of an interference free window (IFW).

The invention relates to a credit enhancer allocation method and system, computer equipment and a storage medium. The credit enhancer allocation method includes receiving a loan request uploaded froma terminal, wherein the loan request carries client information and loan business identifiers; analyzing the client information and the loan business identifiers to acquire multiple loan factors; acquiring a credit enhancer decision tree, calling credit enhancer allocation codes, traversing in the credit enhancer decision tree according to the credit enhancer allocation codes and the loan factorsto acquire corresponding credit enhancer identifiers; recording the credit enhancer identifiers by corresponding to the loan request. By the credit enhancer allocation method, credit enhancers can beallocated for clients through existing allocation codes when the loan factors or the credit enhancer change.

The invention discloses a workshop layout scheduling optimization method based on multi-objective non-dominated sorting. The method comprises the following steps: 1, collecting data related to production resources in an enterprise production process; 2, encoding equipment, layout and processes of a production workshop, and establishing an optimization model; 3, generating a uniform reference point set, and randomly initializing a population Pt of which the scale is N; 4, performing selection, crossover and variation on the population Pt to obtain a filial generation population Qt with the scale of N, and merging the parent population and the filial generation population to obtain a population Rt with the scale of 2N; 5, after the Rt is subjected to non-dominated sorting, dividing the Rt into a plurality of layers such as F1, F2 and the like; 6, indicating that St = F1 union, F2 union... Fl, and until '2jeemaa2' St '2jeemaa2' is greater than or equal to N; 7, normalizing individuals: normalizing all individual targets in the St; 8, setting a clustering operator, and defining the niche number of the ith reference point as rho i; 9, selecting K individuals from the F1 by using the niche number and putting the K individuals into Pt + 1; 10, judging whether the maximum number of iterations is met or not; and 11, generating layout codes and equipment allocation codes.

The invention discloses a memory allocation code detection method, a memory allocation code detection device, computer equipment and a storage medium. According to the technical scheme, the method comprises the following steps that: the computer equipment acquires an intermediate language code of a to-be-detected application program code, determines that an instruction code is a target intermediate language code of a target instruction code in the to-be-detected intermediate language code, and finally determines the position information of the memory allocation code in the to-be-detected application program code by determining the position information of the source code corresponding to the target intermediate language code in the to-be-detected application program code. Therefore, according to the scheme, the position information of the memory allocation code in the to-be-detected application program can be determined through the target intermediate language code. Moreover, the memoryallocation code detection method provided by the invention does not need to run the application program and does not need to exhaust each operation condition of the application program. Therefore, the operation is simple and convenient. The problem of incomplete memory allocation code detection can also be avoided.

The invention discloses a dynamic allocation method of coding vector based on graph coloring in a multicast network. Coding vectors are allocated for the multicast network based on network coding, that target node receives global coding vector linearity is not related is guaranteed. Based on the purpose, the invention provides a coding vector allocation method based on graph coloring, the method comprises the following steps of: converting a multicast tree needing allocation coding vector into a line graph, then dividing the line graph into different areas for constructing simple planar graph, next, mapping different colors into different coding vectors which are allocated to each top point of the areas (namely each edge of the multicast tree). After the global coding vectors are allocated for all the edges of the multicast tree, a source node is needed to record original coding vectors, the target node records decoding matrix, and the coding node calculates and records local coding vectors. During the transmission of data, the source node and the coding node need to transmit linear combination of information vectors and coding vectors downward; and the target node calls the decoding matrix and adopts a Gaussian elimination method for decoding.