272 results about "Digital feedback" patented technology

The disclosure is directed at a configurable light emitting diode (LED) driver/dimmer for controlling a set of light fixture loads comprising: a power circuit; a primary digital controller for controlling the power circuit; a set of output current drivers, each of the set of output current drivers connected to one of the set of light fixture loads for controlling the associated light fixture load; a secondary digital controller for controlling the set of output current drivers; wherein the secondary controller transmits LED control information to control outputs of the set of output current drivers; and wherein the secondary digital controller provides digital feedback control information to the primary digital controller.

A digitally implemented voltage regulator having including a plurality of slaves coupled in parallel. Each slave includes a switching circuit that intermittently couples an input terminal and an output terminal of the voltage regulator in response to a digital control signal for the corresponding slave. A current sensor in each slave generates a digital first feedback signal derived from the current passing through the corresponding switching circuit. A digital controller receives and uses the digital feedback signals from the plurality of slaves to generate a digital control signal for each slave. The digital controller operates active slaves of the plurality of slaves at determined phase offsets to minimize voltage ripple and maintain the output voltage at the output terminal at a substantially constant level.

A digital to analog converter includes a digital processor having an input port adapted to receive an input signal and an output port coupled to an input port of an analog filter wherein the digital processor includes a digital feedback loop which compares a reference digital voltage with a digital voltage provided by a digital model of the analog filter. Using a completely digital feedback loop which compares an input digital voltage with the digital voltage from the digital model of the analog filter results in a single bit digital to analog converter having improved accuracy for a given clock rate and filter. The next digital state of the converter (i.e. ‘0’ or ‘1’) is selected based upon a comparison of the input (or reference) voltage with the digital voltage provided by the digital feedback loop. The digital converter output is then fed to the analog filter. If the analog filter matches the digital model, then the analog voltage will match the digital voltage, and therefore the reference voltage.

In part, aspects of the invention relate to methods, apparatus, and systems for intensity and/or pattern line noise reduction in a data collection system such as an optical coherence tomography system that uses an electromagnetic radiation source and interferometric principles. In one embodiment, the noise is intensity noise or line pattern noise and the source is a laser such as a swept laser. One or more attenuators responsive to one or more control signals can be used in conjunction with an analog or digital feedback network in one embodiment.

A wide range power supply capable of delivering 20V to 5000V is provided. The power supply of the present invention uses switch mode technology to achieve high overall operating efficiency and is capable of operating from no load to full load without loss of regulation. The power supply in accordance with the embodiments of the present invention operates directly from the utility supply (e.g., 110V/220V and 50 Hz/60 Hz). In one embodiment, the power supply's power conversion stage includes the following stages: an input rectifier; a buck converter; a quasi-resonant inverter; and a voltage multiplier. The above indicated stages are connected in series to achieve the large output voltage range. High precision is obtained from a use of a digital feedback loop, possibly in connection with an analog feedback loop.

A laser scanning system in a rapid-protyping system is controlled during vector scanning by providing a commanded-position signal to each of first and second rotary motive devices to rotate respective mirrors of the scanning system, each mirror undergoing acceleration at the beginning of the vector, wherein the commanded-position signals are calculated based on physical mathematical modeling of the acceleration of the mirrors taking into account effects of inertia of the scanning system, and wherein actual positions of the mirrors are measured with fast-response devices and digital feedback control of the mirror positions is employed at a periodic rate sufficiently small to maintain a following error of the laser spot less than about 200 μs at all times. A laser power control method employs a fast-response power meter for measuring laser power.

A multi-bit continuous-time sigma-delta analog-to-digital converter (ADC) has a differential input stage which receives an analog input signal current. A multi-bit feedback current digital-to-analog converter (IDAC) generates a multi-level feedback current depending on a digital feedback signal from a flash ADC. An integrator has a differential input that integrates the difference of the generated current by the multi-bit IDAC and the input signal current on a continuous-time basis. The input stage further comprises a first biasing current source and a second biasing current source which bias the input stage in a mid-scale condition. A first summing node connects to the first differential input line, a first differential input of the integrator and the first output branch. A second summing node connects to the second differential input line, a second differential input of the integrator and the second output branch. A set of chopping switches alternately connect the biasing current sources to the summing nodes in a first configuration and a second, reversed, configuration. The converter receives a modulator clock signal at a frequency F_S and the chopping switches can operate at F_S or a binary subdivision thereof. The integrator amplifier can also be chopper-stabilized.

A capacitive transducer circuit comprises a capacitive transducer having first and second electrodes. The first and second electrodes are biased by respective first and second bias voltages. An amplifier is connected to receive a first analogue signal on an input terminal, the first analogue signal being generated by the capacitive transducer, and to generate a second analogue signal on an output terminal. A digital feedback circuit is connected between the output terminal of the amplifier and the input terminal of the amplifier. The digital feedback circuit is configured to provide one of said first or second bias voltages. The output of a voltage source which provides the other bias voltage for the capacitive transducer may be filtered by a low pass filter. The low pass filter may comprise a switched capacitor filter circuit.

A digital polar transmitter includes a baseband processor configured to receive an input signal and to convert the input signal into a baseband amplitude component and a baseband phase component. The transmitter also includes a phase modulator in communication with the baseband processor. The phase modulator is configured to modulate an RF carrier signal based on the phase component and to generate a phase-modulated RF carrier signal. A power amplifier is provided in communication with the baseband processor and the phase modulator. The power amplifier is configured to amplify the phase-modulated RF carrier signal based on the baseband amplitude component and to generate an amplified RF signal. The transmitter also includes a digital feedback loop in communication with the power amplifier and the baseband processor. The digital feedback loop is configured to detect the amplified RF signal and to provide a digital amplitude feedback signal and a detected phase feedback signal to the baseband processor.

The invention discloses a testing device and a testing method of an electric steering engine. The testing method is characterized in that a digital control instruction is sent and a digital feedback signal is received by an industrial control computer; communication protocol conversion is carried out upon the digital control instruction and the feedback signal by a test transfer box; when the electric steering engine to be tested is of analogue type, digital-to-analogue conversion is carried out upon the digital control instruction signal after communication protocol conversion to generate an analogue control instruction; analogue-to-digital conversion is carried out upon a feedback signal after communication protocol conversion to generate a digital feedback signal; the electric steering engine to be tested is controlled by an electric steering engine controller to drive a simulated load table to work according to the digital control instruction or the analogue control instruction, and a signal generated during work is sent to the test transfer box to be used as a feedback signal. According to the testing device and the testing method disclosed by the invention, the entire test device is commonly used in test of analogue and digital electric steering engines through functions of analogue-to-digital conversion and digital-to-analogue conversion of the test transfer box, so that the test process is simplified.

A transmit path correction system (34) for compensating for digital DC offsets, I/Q gain imbalances and I/Q phase imbalances includes a mixed signal forward path (36) and a mixed signal feedback path (38). The forward pat (36), which is operable to process input data symbols to produce at least one analog output signal, preferably includes a digital DC offset correction circuit (86) for compensating for digital DC offsets in the forward path (36) using at least one digital feedback signal (82, 84), an I/Q phase equalization circuit (90) for compensating for the I/Q phase imbalances in the forward path (36), and an I/Q gain equalization circuit (88) for compensating for the I/Q gain imbalances in the forward path (36) using the digital feedback signal(s) (82, 84). The feedback pat (38) processes the analog output of the forward path (36) to produce the digital feedback signal(s) (82, 84).

A capacitive transducer circuit includes a capacitive transducer having first and second electrodes. The first and second electrodes are biased by respective first and second bias voltages. An amplifier is connected to receive a first analog signal on an input terminal, the first analog signal being generated by the capacitive transducer, and to generate a second analog signal on an output terminal. A digital feedback circuit is connected between the output terminal of the amplifier and the input terminal of the amplifier. The digital feedback circuit is configured to provide one of said first or second bias voltages. A switched capacitor filter circuit may be arranged between the voltage source and the transducer and may be arranged to filter the output of the voltage source.

A system for controlling a soft start for a switching converter includes a digital feedback control system for receiving an analog voltage signal representing the output of a switching converter, for digitally processing the analog voltage signal by comparing it to a corrected reference voltage to generate a voltage error signal and for generating drive signals to control the operation of the switching converter to provide a regulated output. A microcontroller providers a secondary feedback loop for generating the corrected reference voltage. The secondary feedback loop enabling the output voltage signal to vary linearly over time during a soft start.

A digital controller configured to inject a signal into a digital feedback path that facilitates regulation of a power converter and measure the corresponding phase, gain, or frequency. The digital controller may also include an adaptive tuning controller for adjusting power converter operating attributes based in part on the measurements. In an exemplary embodiment, the adaptive tuning controller uses the phase, gain, and/or frequency measurements to adjust the digital feedback signal. In an exemplary embodiment, the adaptive tuning controller compares the operating measurements with desired values and generates adjusted operating attributes. In accordance with an exemplary embodiment, the monitoring and adjusting of the digital feedback signal occurs while the digital controller is regulating a power signal in the power converter.

A method and apparatus for generating a pronunciation score by receiving a user phrase intended to conform to a reference phrase and processing the user phrase in accordance with at least one of an articulation-scoring engine, a duration scoring engine and an intonation-scoring engine to derive thereby the pronunciation score. The scores provided by the various scoring engines are adapted to provide a visual and/or numerical feedback that provides information pertaining to correctness or incorrectness in one or more speech-features such as intonation, articulation, voicing, phoneme error and relative word duration. Such useful interactive feedback will allow a user to quickly identify the problem area and take remedial action in reciting “tutor” sentences or phrases.

An Analog-to-Digital Converter (ADC) is provided. An embodiment of the ADC includes a modified Delta modulator including a digital feedback loop, and a digital Sigma-Delta modulator configured within the feedback loop. Embodiments of the invention provide analog functionality with all the benefits of a digital design process as well as various other advantages provided by a Delta-Sigma-Delta modulator configuration.

A method and an RF transmit system for generating RF transmit signals for feeding an RF transmitter (14) in the form of, or comprising, one or more antenna device(s), coil(s), coil elements, or coil array(s) is disclosed. Furthermore, a multi-channel RF transmit system for feeding a plurality of such RF transmitters, especially for use as an RF excitation system in a magnetic resonance imaging (MRI) system for exciting nuclear magnetic resonances (NMR) is disclosed. A demand RF transmit signal is compared in the digital domain with an RF transmit signal and digitally corrected with respect to differences or errors between both by means of a complex predistorter (11), an adaption unit (17) and a look-up table unit (18).

Methods and systems for applying digital dither includes methods and systems for applying digital dither in data converters, such as, for example, delta-sigma data converters. In an embodiment, an analog signal from a first path of a delta-sigma modulator is quantized to an m-bit digital signal and an n-bit dithered digital feedback signal is generated from at least a portion of the m-bit digital signal. The n-bit dithered digital feedback signal is converted to an analog feedback signal and fed back to a second path of the delta-sigma modulator. In an embodiment, the n-bit dithered digital feedback signal is generated by selecting one of a plurality of sets of n-bits from the m-bit digital signal depending upon a state of a dither control signal. The dither control signal can alternate between a plurality of states or pseudo-randomly switch between a plurality of states. In an embodiment, the m-bit digital signal is an m-bit thermometer code signal and the n-bit dithered digital feedback signal is generated by selecting between bits 0 through m-2 and bits 1 through m-1 of the m-bit digital signal. In an alternative embodiment, the m-bit digital signal is an m-bit thermometer code signal and the n-bit dithered digital feedback signal is generated by selecting between even and odd bits of the m-bit digital signal.

The present invention relates to a digital offset phase-locked loop (DOPLL), which may have advantages of size, simplicity, performance, design portability, or any combination thereof, compared to analog-based phase-locked loops (PLLs). The DOPLL may include a digital controlled oscillator (DCO), which provides a controllable frequency output signal based on a digital control signal, a radio frequency (RF) mixer circuit, which provides a reduced-frequency feedback signal based on the controllable frequency output signal without reducing loop gain, a time-to-digital converter (TDC), which provides a digital feedback signal that is a time representation of the reduced-frequency feedback signal, and digital PLL circuitry, which provides the digital control signal based on the digital feedback signal and a digital setpoint signal.