110 results about "Programmable filters" patented technology

An enhancement system improves the perceptual quality of a processed speech. The system includes a delay unit that delays a signal received through a discrete input. A spectral modifier linked to the delay unit is programmed to substantially flatten the spectral character of a background noise. An adaptive filter linked to the spectral modifier adapts filter characteristics to match a response of a non-delayed signal. A programmable filter is linked to the delay unit. The programmable filter has a transfer function functionally related to a transfer function of the adaptive filter.

A graphics system configured to perform programmable filtering of samples to generate pixel values. The graphics system comprises a frame buffer, an accelerator unit and a video output processor. The accelerator unit receives graphics primitives, renders samples for the graphics primitives, and stores the rendered samples into a sample area of the frame buffer. The accelerator unit subsequently reads the samples from the sample area of the frame buffer, and filters the samples with a programmable filter having a programmable support region. The resulting pixel values are stored in a pixel area of the frame buffer. The video output processor reads the pixel values from the pixel area and converts the pixel values into a video signal which is provided to a video output port.

A method of motion compensation for an input block is disclosed. The method generally includes the steps of (A) generating a plurality of tap values in response to a motion vector for the input block, (B) generating an interpolated block by programmable filtering a reference block using the tap values, the interpolated block being spatially offset from the reference block by less than a half-pel separation and (C) generating an output block in response to the input block and the interpolated block.

A DSP-based and multi-channel digital filter chip providing crossover filtering and parametric equalization. Crossovers can be low-pass, high-pass, or band-pass filters with programmable cutoff frequencies. Each equalizer band has independently adjustable center frequency band, and levels over a -60 dB to +16 dB range. The chip can work either with a microprocessor controlling the chip or in a stand-alone mode having the filter settings downloaded automatically from an external EEPROM. The chip is ideal for applications that require precise digital filtering or software programmable filters, and is also an alternative to analog filters, eliminating passive components and reducing circuit size.

A software analysis system having a filter for selectively collecting tags generated by a target system during execution of a software program under analysis in accordance to a programmable filtering criteria. The system includes a decoder for decoding the tag type of the tags captured from the data bus of the target system, and a comparator for comparing the tag types to the programmable filtering criteria to determine whether the tag should be collected. The programmable filtering criteria may be programmed by collecting filter tags from the target system, or directly programmed by a software developer using a filtering user interface. The programmable filtering criteria is implemented by a filter table that stores a flag associated with each tag type. The flag is indicative of whether tag data of a respective tag type should be collected. Tag data of the tag types meeting the programmable filtering criteria have timestamp information appended to the tag data and are collected in a tag buffer.

An embodiment of the present invention provides a phase locked loop that operates on clock signals derived from an RF clock signal generated by the phase locked loop. A frequency reference input provides a reference clock. A controllable oscillator generates the RF clock signal. A phase detection circuit operates on the reference clock to provide digital phase error samples indicative of a phase difference between the reference clock and the RF clock. A programmable filter is connected to receive the phase error samples and connected to provide a filtered output having a gain and a phase margin to the controllable oscillator. The programmable filter includes a proportional loop gain control having a programmable loop gain coefficient (alpha-α) and an integral loop gain control having a programmable loop gain coefficient (rho-ρ). Alpha and rho are configured to be programmatically changed simultaneously and are selected such that the gain is changed and the phase margin remains substantially unchanged

An enhancement system improves the perceptual quality of a processed speech. The system includes a delay unit that delays a signal received through a discrete input. A spectral modifier linked to the delay unit is programmed to substantially flatten the spectral character of a background noise. An adaptive filter linked to the spectral modifier adapts filter characteristics to match a response of a non-delayed signal. A programmable filter is linked to the delay unit. The programmable filter has a transfer function functionally related to a transfer function of the adaptive filter.

Methods and apparatus for controlling a controlled oscillator using a phase-locked loop (PLL) or frequency-locked loop (FLL) having a digital loop filter with programmable filter parameters. An exemplary PLL (or FLL) includes a digital loop filter having one or more of the programmable filter parameters, which are changed by increments during operation in order to minimize disturbances (e.g., settling transients) as the loop bandwidth of the PLL is varied from a narrow loop bandwidth to a wide loop bandwidth, or vice versa. By changing the loop filter parameters in increments the loop bandwidth can be varied with substantially no perturbation. The end result is a much faster frequency switching time, improved settling dynamics, and predictable and stable loop operating performance. According to another aspect of the invention, one or more of the programmable filter parameters are changed in order to oppose a change in tuning sensitivity of the controlled oscillator (e.g., in order to maintain a constant loop bandwidth). By holding the loop bandwidth constant, switching time is maintained substantially constant under all conditions. This allows design and production margins to be reduced in a frequency agile system, and also relaxes the tuning sensitivity linearity requirements of the controlled oscillator.

An embodiment of the present invention provides a phase locked loop that operates on clock signals derived from an RF clock signal generated by the phase locked loop. A frequency reference input provides a reference clock. A controllable oscillator generates the RF clock signal. A phase detection circuit operates on the reference clock to provide digital phase error samples indicative of a phase difference between the reference clock and the RF clock. A programmable filter is connected to receive the phase error samples and connected to provide a filtered output having a gain and a phase margin to the controllable oscillator. The programmable filter includes a proportional loop gain control having a programmable loop gain coefficient (alpha—α) and an integral loop gain control having a programmable loop gain coefficient (rho—ρ). Alpha and rho are configured to be programmatically changed simultaneously and are selected such that the gain is changed and the phase margin remains substantially unchanged.

Methods and apparatus for generating and transmitting frequency division multiplexed signals are described. The methods are well suited for use where a device uses a small subset, M, of a larger set of N subcarrier frequencies at any given time. Each transmitted FDM signal is generated by combining a plurality of individual analog subcarrier signals whose frequency may change, e.g., be hopped as a function of time. Each generated analog subcarrier signal is amplified, e.g., power amplified, and filtered prior to being combined with other analog subcarrier signals. Filters are used to compensate for or correct signal distortions and / or reduce interference between subcarriers. Fixed frequency filters are used in an exemplary frequency hopping OFDM system. In another embodiment, the filters are programmable and change, e.g., in terms of center frequency, to match the selected subcarrier frequency as frequency hopping occurs. The bandwidth of the programmable filters may remain constant.

A multimode communication device with a shared signal path programmable filter and a method for utilizing a shared signal path programmable filter in a multimode communication device. Various aspects of the present invention comprise a first module adapted to receive a first communication signal (e.g., corresponding to a first communication protocol) and a second module adapted to receive a second communication signal (e.g., corresponding to a second communication protocol). A shared filter, communicatively coupled to the first and second modules, may be adapted to filter the first and / or second communication signals in accordance with a plurality of selectable sets of filter response characteristics (e.g., associated with the first and second communication protocols). A filter control module may be adapted to select a set of filter response characteristics from a plurality of such sets and program the shared filter to filter a communication signal in accordance with the selected set.

The invention discloses an effective stress level test device and method of a vertical prestressed reinforcement. An ARM (Advanced RISC Machines) processor is connected with an ultrasonic pulse generator; a pulse signal emitted from the ultrasonic pulse generator is transmitted to an ultrasonic transducer via a boosted circuit and a transmitter circuit; the ultrasonic transducer transmits the ultrasonic wave to a data register via a programmable filter, a programmable amplifier and an A / D (analog-to-digital) converter; collected signals are sent to a DSP (Digital Signal Processor) by the data register; the DSP stores the signals in an RAM (Random-Access Memory) storage area; the ARM processor is connected with a memory, a keyboard, a display, the programmable amplifier, the programmable filter, the RAM storage area and a temperature measurement circuit; and the temperature measurement circuit is connected with a temperature sensor. The device has the characteristics of no loss, high speed, high accuracy and low cost, especially can quantify the influence of temperature on a stress measurement result, can correct the stress level test error of the vertical prestressed reinforcement so as to obtain the effective stress level value of the vertical prestressed reinforcement with the engineering accuracy.

A localized content adaptive filter system including a tile buffer having an output providing first image information, a frequency analyzer providing a frequency information signal based on frequency content of the first image information, and an adaptive filter which is adjusted based on the frequency information signal. The frequency analyzer may include a wavelet transform filter and a frequency content analyzer. The adaptive filter may include filter select logic which receives the frequency information signal and second image information associated with the first image information, and which provides filtered image information. The filter select logic determines a filter based on the frequency information signal and the determined filter filters the second image information to provide the filtered image information. The filter select logic may include preconfigured filters in which a filter is selected by the frequency information, or a programmable filter which is programmed according to the frequency information.

The present invention discloses a method for finding an optimized filter parameters design to meet input specifications and hardware constraints in accordance with a typical single channel digital IF programmable downconverter. Said typical single channel digital IF programmable downconverter comprises four stages, including a high speed down-sampling stage, a spectral shaping stage, a rate matching stage and an oversampling stage. According to input specifications, said method firstly determines a number of Halfband interpolation filters used in said oversampling stage, secondly obtains optimized parameters for a CIC decimation filter and a Halfband decimation filter in said high speed down-sampling stage, using as many Halfband decimation filters as possible. Then determine if it is necessary to use re-sampling FIR filter for rate matching. Finally, use various function window to design programmable FIR filter for spectral shaping, obtains an overall synthesized spectral response which meets input specifications.

A disk drive having a motor and a velocity control loop, which includes a frequency detector and a filter. The filter includes a filter section and an accumulator. The filter is programmable in that filter coefficient(s) are dynamically received by the filter section. One embodiment of the filter section is an infinite impulse response filter. One embodiment of the filter is a digital integrated circuit. A method for compensating a control loop by infinite impulse response filtering and accumulating. The control loop may be a position, velocity, acceleration or force control loop. A programmable digital integrated circuit for compensating a velocity control loop having a filter section cascaded with an accumulator. The integrated circuit may include memory for storing filter coefficient(s) for the filter section, thereby not requiring external components.

An adaptive array for detecting a signal of interest (SOI) that includes antenna elements, digital Finite Impulse Response (FIR) filters having programmable filter weights, a digital beamformer having programmable array weights and an adaptive control unit. Each antenna output signal is processed by an FIR filter to produce a filtered element signal. The filtered element signals are combined by the beamformer to produce an adaptive array output. The adaptive control unit adjusts the filter and array weights to maximize the adaptive array response to the SOI while minimizing the response to interfering signals. The adaptive control unit can use the frequency, look angle or polarization of the SOI, to constrain the spatial gain or polarization in the direction of the SOI, or to form a pass band at the SOI frequency. The adaptive control unit can equalize the beamformer frequency response to compensate for dispersion introduced by diverse antenna locations.

A field programmable filter array with high spectral isolation and reconfigurability. A bank of resonators can be programmed at will and on the fly to give any type of filtering response. The order, type and bandwidth of the filter are electronically reconfigured. Each subset of resonators can switch between bandstop and bandpass configurations and form custom filter shapes consisting of combinations of bandstop and bandpass filters. The filter can include a unit cell of a resonator with a series of switches to enable coupling to any of its nearest neighbors. The path in which the flow of energy takes through the array of resonators is dynamic, and the filtering function which is created is dialable on demand.

A graphics system configured to perform programmable filtering of samples to generate pixel values. The graphics system comprises a frame buffer, an accelerator unit and a video output processor. The accelerator unit receives graphics primitives, renders samples for the graphics primitives, and stores the rendered samples into a sample area of the frame buffer. The accelerator unit subsequently reads the samples from the sample area of the frame buffer, and filters the samples with a programmable filter having a programmable support region. The resulting pixel values are stored in a pixel area of the frame buffer. The video output processor reads the pixel values from the pixel area and converts the pixel values into a video signal which is provided to a video output port.

Programmable filters are used for the purpose of changing the filter cutoff frequency as may be necessary for the operation of a wireless transmitter or receiver. Frequencies may be changed by selecting a desirable value of a capacitor and / or a resistor. The programmable filter controls the frequency according to the disclosed method. Furthermore, in order to reduce the area consumed by the programmable filter a three-dimensional layout is used. In accordance with the disclosed invention it is possible to program the input of the programmable filter to have a higher or lower input resistance as may be required while maintaining the desired programmed cutoff frequency by switching the respective capacitors in a capacitor bank, thereby combining the elements needed for frequency programmability and input impedance level selection.

A method, system and apparatus for obtaining a parameter of interest from a plurality of sensors in a fiber optic cable deployed in a wellbore are disclosed. Light having variable frequency within a range of frequencies is propagated along the fiber optic cable. Signals are received that are responsive to interaction of the propagated light with the plurality of sensors. The received signals are filtered using a programmable filter. The parameter of interest is obtained from the filtered signals. In one aspect, the fiber optic cable is coupled to a member deployed in the wellbore and the parameter of interest is related to the member.

A multimode communication device with a shared signal path programmable filter and a method for utilizing a shared signal path programmable filter in a multimode communication device. Various aspects of the present invention comprise a first module adapted to receive a first communication signal (e.g., corresponding to a first communication protocol) and a second module adapted to receive a second communication signal (e.g., corresponding to a second communication protocol). A shared filter, communicatively coupled to the first and second modules, may be adapted to filter the first and / or second communication signals in accordance with a plurality of selectable sets of filter response characteristics (e.g., associated with the first and second communication protocols). A filter control module may be adapted to select a set of filter response characteristics from a plurality of such sets and program the shared filter to filter a communication signal in accordance with the selected set.

Aspects of a method and system for a single-chip FM tuning system for transmit and receive antennas may include in a frequency-modulation (FM) radio system comprising an integrated FM radio transmitter and FM radio receiver: receiving via a receive antenna for the FM radio system a radio-frequency (RF) signal transmitted from a transmit antenna of the radio transmitter. A frequency response of said receive antenna and / or a frequency response of said transmit antenna may be adjusted based on said received RF signal. The frequency response of the receive antenna and / or the transmit antenna may be adjusted dynamically, autonomously, sequentially and / or simultaneously. The receive antenna and / or the transmit antenna may be adjusted via a programmable filter, which may comprise inductive and capacitive components. The programmable filter may comprise a programmable array of inductors and / or a programmable array of capacitors.

A device for processing an intermediate analogue signal received from a previous system with a baseband processor. The processor includes an ordinary feedback loop for adjusting the strength of the intermediate analogue signal received from the previous system. The processor further includes a first DC offset reduction loop and a second DC offset reduction loop. A programmable filter bank and the corresponding control elements are provided so that the second DC offset reduction loop can reduce the DC offset in a flexible way. In the present invention, the DC offset can be reduced effectively and the gain training period relating to the previous system and the baseband processor can be shortened.

Yhe invention relates to a multimode communication device with a shared signal path programmable filter. Various aspects of the present invention comprise a first module adapted to receive a first communication signal corresponding to a first communication protocol and a second module adapted to receive a second communication signal corresponding to a second communication protocol. A shared filter, communicatively coupled to the first and second modules, may be adapted to filter the first and / or second communication signals in accordance with a plurality of selectable sets of filter response characteristics associated with the first and second communication protocols. A filter control module may be adapted to select a set of filter response characteristics from a plurality of such sets and program the shared filter to filter a communication signal in accordance with the selected set.

A method and apparatus for selective programmable filtering using analog circuits with time-varying components (e.g., resistances, capacitances) is presented. An analog front end receives an electronic signal and filters said signal by a passive or active continuous-time filter, having a combination of equivalent memory-less (e.g., resistive) and memory (e.g., capacitive or inductive) elements. A variable resistor circuit allows switching through a range of values to control one or more of the equivalent resistances of the passive or active continuous-time filter. The variable resistors are controlled using a control circuit to periodically modulate the resistances in the continuous-time filter between periodic sampling instances, such as during analog to digital conversion. Such periodic modulation of the resistances in the continuous-time filter allows for the programming and enhancement of the selectivity of said filter.

A system and methods for generating a variable rate filtered output using synchronous filters having the same filter sampling time, that avoids complexities of asynchronous filters. A system employs multiple filters that are staggered in time and set so that the output of one of the multiple filters is available whenever a secondary process requires state information. In another embodiment, the synchronous filters are programmable so as to change the filter sampling time. This configuration is possible when it is known that the prescribed time interval of the secondary process is longer than the filter sampling time and the prescribed time interval is an integer multiple of the filter sampling time. By using programmable filters, the number of filters required to accommodate a certain prescribed time interval can be minimized. Whether a system employs multiple non-programmable filters staggered in time or programmable filters, the invention achieves producing a variable rate filtered output while using synchronous filters. Thus, computationally intensive and complicated variable rate filters can be avoided while minimizing processor requirements. In another aspect of the invention, the inventive method of generating a variable rate filtered output is employed in a lithography system to control the movements of various components therein. In one embodiment, the filtered outputs are used to estimate the relative positions of the reticle and the wafer. With the variable rate feature, the lithography system can dynamically accommodate for the noise arising from component movements and other sources in the wafer exposure process.