33 results about "Program tracing" patented technology

A method for dynamic application tracing in virtual machine environments comprises receiving an instrumentation request that includes an identification of a probe point at which instrumentation code is to be inserted within an application. The method may further comprise making a determination whether the instrumentation code meets one or more acceptance criteria. If the instrumentation code is found to be acceptable, the method may further comprise inserting the instrumentation code at the probe point within the application while the application is executing within a virtual machine, and obtaining information indicative of application state from an execution of the instrumentation code when the probe point is reached during application execution.

A method for dynamic application tracing in virtual machine environments comprises receiving an instrumentation request that includes an identification of a probe point at which instrumentation code is to be inserted within an application. The method may further comprise making a determination whether the instrumentation code meets one or more acceptance criteria. If the instrumentation code is found to be acceptable, the method may further comprise inserting the instrumentation code at the probe point within the application while the application is executing within a virtual machine, and obtaining information indicative of application state from an execution of the instrumentation code when the probe point is reached during application execution.

A system and method for coupling a distributed statistical records (“DSR”) collection system with a tracing system utilizing bytecode modification techniques. In one embodiment, a distributed statistical records (“DSR”) module initially identifies one or more application components within the application server to be traced. A bytecode modification module responsively modifies the bytecode of the one or more application components. The modifications are directed to a particular set of methods of the application components (e.g., methods which are relevant to DSR data). A dispatch unit registers the method invocations and method-related information associated with the particular set of methods and provides the method-related information to the DSR module. Finally, a DSR interface module translates the method-related information to a format employed within a DSR system and forwards the translated information to the DSR system.

A method monitors non-faulty application traces of a computer application with the runtime environment during fault-free activities to create non-faulty runtime signatures for the computer application. Once obtained, the method stores the non-faulty runtime signatures. The method then detects a faulty application trace of the computer application and compares the faulty application trace with the non-faulty runtime signatures by comparing a call graph of the faulty application trace with call graphs of non-faulty application traces of the application signatures to identify differences between the two (e.g., fault attributes). Then the invention outputs the fault attributes to allow the user to identify a fault cause.

Recording a replay-able trace of execution of a multi-threaded process includes identifying a trace memory model that defines one or more orderable events that are to be ordered across a plurality of threads of the multi-threaded process. The plurality of threads are executed concurrently across one or more processing units of one or more processors. During execution of the plurality of threads, a separate replay-able trace is recorded for each thread independently. Recording includes, for each thread, recording initial state for the thread, recording at least one memory read performed by at least one processor instruction executed by the thread that takes memory as input, and recording a least one orderable event performed by the thread with a monotonically increasing number that orders the event among other orderable events across the plurality of threads.

The invention relates to a designing method for anti-interference property of computer CPU, comprising adding program tracking address register (PTAR), program tracking flag register (PTFR) and program interference flag register (PIFR) and additionally adding three select two counter (CPC), three select two instruction register (ICR) and adding nonscreened interruption (NSI). And a computer designed by this method can both effectively monitor program counter (PC) interference and instruction interference and records the interference interruption point and restoration interruption of the program, therefore provided with the characters of stronger anti-interference property, more accurate and reliable interference judgment, more effective failure treatment as well as real-time property, repairability and scientificalness.

Since multi-core processors have become the standard architecture for general purpose machines, programmers are required to write software optimized for parallelism. Verification of correctness is an important issue for parallel code because of its complexity. There are still tools missing that provide verification for complex code, such as testing the execution of code provides. Consequently, described herein are systems and methods to evaluate the correctness of program traces. Furthermore, the systems and methods described herein do not demand excessive computational requirements and the size of the program trace being evaluated increases.

A high speed debug support interface has circuits to interface on-chip debug support circuits to a high bandwidth communications port means located on the surface of a system integrated circuit (101) and to on-chip debug support circuits (100). The communication port means can be realised by bonding or integrating special sender and or receiver cells preferably optical sender cells (103) and or optical receiver cells (110) onto the surface of the system integrated circuit (101). The high speed debug support interface communicates with on-chip or in-assembly debug support circuits and an external development tool (108) to permit hardware and software related debugging and development activities, including program tracing, data tracing and memory substitution. The high speed debug support interface has circuits to interface on-chip debug support circuits to system resources such as memory located within the device assembly (102) and connected by the system interconnect.

The invention discloses a path traversal vulnerability detection method. The method comprises the following steps of 1, performing program instrumentation on a Java EE program through a byte code enhancement method; 2, by the instrumentation program, tracking the propagation path of data, obtained from the outside by the Java EE program, in the program; 3, when the instrumentation program finds that external data is directly propagated to the path traversal risk method without passing through a security filtering method, performing vulnerability detection logic judgment; and when the instrumentation program finds that the external data is propagated through the security filtering method, determining that the vulnerability does not exist. According to the method, the data flow direction during running of the application program can be tracked in real time during running of the Java EE program, the real forming process of the vulnerability and the specific code position of the vulnerability can be detected, and online, real-time, comprehensive and accurate vulnerability detection is achieved. Meanwhile, whether the vulnerability exists or not can be determined by analyzing the propagation paths of the stains in different scenes, and the possible utilization harm of the vulnerability can be given separately.

A system, method and software application track call failures on a wireless phone. A software application on the phone monitors outbound calls made on the phone to determine whether or not a call fails. In one embodiment, such monitoring is done only for a select period of time (e.g., the initial few seconds when the phone is attempting to connect to a call to the wireless communication carrier's network), and, in an alternate embodiment, such monitoring is done for the duration of the call. If a call fails, the software application stores information related to the call. Examples of such types of information include the time the call failed, the location of the phone at call failure, and identification information for the phone. The stored call information is then sent to the wireless communication carrier to enable the carrier to assess network quality.

The invention provides a device and a method for tracing cracks of a rock sample. The device comprises a tracer and a support platform, wherein the tracer comprises a transparent container with the Y-coordinate and the X-coordinate, the support platform is connected with the transparent container by bearings, and the transparent container can rotate relative to the support platform. The method comprises the following steps of installing the rock sample, tracing points, and imaging; or installing the rock sample, scanning and carrying out image processing. The device for tracing the cracks of the rock sample has the advantages of simpleness in manufacturing, high precision, convenience in operation and maintenance, and realization in programmed tracing; the method for tracing the cracks of the rock sample has the advantages of high working efficiency and convenience.

The invention relates to a designing method for anti-interference property of computer CPU, comprising adding program tracking address register (PTAR), program tracking flag register (PTFR) and program interference flag register (PIFR) and additionally adding three select two counter (CPC), three select two instruction register (ICR) and adding nonscreened interruption (NSI). And a computer designed by this method can both effectively monitor program counter (PC) interference and instruction interference and records the interference interruption point and restoration interruption of the program, therefore provided with the characters of stronger anti-interference property, more accurate and reliable interference judgment, more effective failure treatment as well as real-time property, repairability and scientificalness.

The invention discloses a method and a device used in program tracking and an electronic device, as well as a traffic control method and device and the electronic device. The method used in the program tracking comprises the steps of receiving a calling request which is sent by a calling party and is corresponding to a special program; according to the calling request, and generating a tracking identifier; and executing each level of subprogram included in the special program, generating tracking data of the subprogram for at least one subprogram after the subprogram is executed, and storing corresponding records of the tracking identifier and the tracking data of the subprogram. By adopting the method provided by the invention, a non-OSGi (Open Service Gateway initiative) application program, when tracking and recording a function operating condition of the OSGi subprogram, can separate a tracking processing logic and a service processing logic of the subprogram, and the transformation at a source code level on each subprogram is prevented; and thus, the effect of not affecting the robustness and the reliability of non-OSGi application program service processing is achieved.

A system, apparatus and method for managing input / output requests in a multi-processor system is disclosed. An IO coherence unit includes an IO request handler, a variable size transaction table, and an IO response handler. The size of the transaction table varies according to the number of pending IO requests. The IO request handler stores information about pending IO requests in the transaction table to establish an order among related requests and to permit out-of-order handling of unrelated requests. The IO response handler tracks responses to the IO requests and updates the information in the transaction table. The IO coherence unit returns responses to requesting devices in compliance with device ordering requirements.

The embodiment of the present invention provides a method and device for process cleaning, creating a PHP tracking program in the PHP interpreter; using the PHP tracking program to track the function information in the execution process of the operation compiled by the PHP interpreter for the process ; According to the function information, detect whether the usage rate of the processor corresponding to the PHP interpreter is greater than a preset threshold; when it is detected that the processor usage rate is greater than the preset threshold, from the running process Select non-essential processes in and clear the non-essential processes. The embodiment of the present invention can acquire and output function information in the execution process of an operation in real time, so that developers of PHP scripts can quickly locate PHP script problems.

The invention provides a fuzzy test system based on program tracking and hybrid execution, and the system mainly comprises three modules: a fuzzy test module, a data flow tracking module, and a hybridexecution module. Wherein the input of the fuzzy test module is a target binary program, the type information of variables corresponding to byte sequences in a seed test case and the seed test case extracted by the data flow tracking module is output as a test case for triggering a new path; wherein the input of the data flow tracking module is a seed test case loaded by the target binary programand the fuzzy test module, and the output of the data flow tracking module is a dependency relationship between type information of variables corresponding to byte sequences in the seed test case anddata in the target binary program; wherein the input of the hybrid execution module is a dependency relationship of data in a target binary program provided by the data flow tracking module in real time, and the output of the hybrid execution module is a candidate test case which is newly generated by the module and can trigger a new path. Compared with the prior art, the system can improve the effectiveness of test case generation.

The invention relates to a dynamic slicing system based on the execution tract of a program, which comprises functions as follows: acquiring execution path information of the program, statically analyzing a class file of the Java, analyzing the attached variable set of each sentence of each sequence in the execution track of the program, acquiring a direct control dependence junction point of each sentence in a source program, executing additional control dependence of each sentence of each sequence in the execution tract of the program and dynamically slicing the process internal program of the Java. Retrospection of the program is not required during program slicing; efficiency of algorithm is greatly improved; and precision of the program slicing is advanced according to a control dependence relationship and definition reference information of variable.