34results about How to "Eliminate frequency offset" patented technology

The invention relates to a radio-frequency circuit comprising: - a control unit; and - a phase-locked loop; wherein the control unit is arranged to determine an offset between an actual value of a reference frequency at the input to the loop on the basis of a measurement of the signal output from the filter of the loop, and a theoretical value of said frequency known to the control unit, via a relation known to the control unit, and to control a correction of said offset.

The invention discloses a method for eliminating frequency deviation through temperature compensation in a WCDMA frequency selector, wherein frequency deviation is formed due to environmental temperature change in a medium-frequency sound meter, and the N frequency-division coefficient of a phase-locking frequency-doubling circuit is controlled according to a frequency deviation quantity, so thatthe deviation quantity consistent with the medium-frequency sound meter is also generated by the output of a VCO (Voltage Controlled Oscillator) to eliminate the frequency deviation. The invention mainly discloses a device for eliminating the frequency deviation through temperature compensation in the WCDMA frequency selector, which comprises a temperature detection module, a microprocessing module and the phase-locking frequency-doubling circuit, wherein the temperature detection module is used for detecting the environmental temperature of the medium-frequency sound meter, and the microprocessing module is used for outputting a control level according to the frequency deviation quantity generated by temperature and controlling the N frequency-division coefficient in the phase-locking frequency-doubling circuit. The invention eliminates the frequency deviation in the WCDMA frequency selector by using a temperature compensation method and keeps the stability and the good communicationquality of the WCDMA frequency selector.

The invention discloses a method and a device for eliminating frequency offset jump, and belongs to the field of mobile communication. The method comprises the following steps: performing frequency offset estimation on a symbol output by a phase-locked loop by tracking within a first time unit to obtain a first frequency offset estimation value of the first time unit; determining whether or not the frequency offset jump occurs on the symbol output by the phase-locked loop by tracking within the first time unit according to a second frequency offset estimation value of a second time unit and the first frequency offset estimation value of the first time unit, wherein the second time unit is ahead of the first time unit; and if so, eliminating frequency offset generated on the symbol output by the phase-locked loop by tracking within the first time unit by the frequency offset jump according to the first frequency offset estimation value of the first time unit and the second frequency offset estimation value of the second time unit. The device comprises a first acquisition module, a determination module and a first elimination module. Through adoption of the method and device, the frequency offset jump can be eliminated under the situation of not generating interference among users, and the system performance at a base station switching moment is enhanced.

A method, device and system for calibrating an equipment clock, a self-calibrating method and equipment, the equipment includes a TSXO and a GPS module, and the GPS module includes a signal receiver; the method for calibrating the equipment clock includes: through the GPS module eliminating the self-contained frequency offset of the TSXO; and calibrating the temperature drift of the TSXO. Through this method, a low-cost and high-precision clock solution with a built-in positioning function can be provided for ubiquitous connected devices.

The invention relates to an analog-digital hybrid high-speed signal time measurement system based on clock data recovery, and belongs to the field of communication signal processing. The system comprises a laser receiving module, a clock data recovery module, a clock management module, a frequency mixing module, a low-pass filtering module, a sampling module, a carrier tracking module, a signal capturing module and a ranging velocity measurement information resolving module. Through the system disclosed by the invention, the dependency on the high-speed ADC by a signal processing algorithm canbe reduced, the requirement on the ADC sampling rate is reduced, the data communication rate is further improved, the information utilization rate on the communication / ranging frame can be increased,and the ranging velocity measurement precision is improved.

A device clock calibration method, device and system, self-calibration method and device, the device includes a TSXO and a WIFI module, the device clock calibration method includes: eliminating the self-contained frequency offset of the TSXO through the WIFI module ; Calibrate the temperature drift of the TSXO. Through this method, a low-cost and high-precision clock solution with a built-in positioning function can be provided for ubiquitous connected devices.

The present invention relates to a method for eliminating frequency offset in a communication system by using sync header predistortion, which comprises the following steps: (1) the terminal eliminates the frequency offset of the data signal after the sync header according to the received sync header; (2) Observing the constellation diagram of the data signal obtained in step (1) and the receiving signal-to-noise ratio of the data signal output after calculation by the terminal, determining the constellation diagram rotation angle of the data signal after the frequency offset is removed; (3) The constellation diagram rotation angle of the data signal after the frequency offset is eliminated is used as the sync header pre-distortion value, and the sync header pre-distortion value is configured through the network management; (4) the base station performs pre-distortion processing according to the sync header pre-distortion value configured by the network management And send the downlink signal after the pre-distortion processing; (5) The terminal eliminates the frequency offset of the data signal after the sync header according to the sync header after the pre-distortion processing. With the help of the method, the frequency offset in the communication system can be eliminated accurately and effectively, and the normal operation of the system is guaranteed.

The application discloses an uplink frequency deviation correction method and device. The method comprises the following steps: determining effective RRU number receiving user equipment UE data; triggering a corresponding receiving data processing procedure according to the determined effective RRU number; when the effective RRU number is one, converting a processing result to a time domain after the channel estimation and the equilibrium processing are performed on the receiving data on the RRU, and performing the frequency deviation correction of a data symbol on the result converted to the time domain; when the effective RRU number is multiple, converting the processing result to the time domain after performing the resource de-mapping and before performing the equilibrium processing on the receiving data on each effective RRU, performing the frequency deviation correction of the data symbol on the result converted to the time domain, and converting the frequency deviation correction result to the frequency domain, and then performing the equilibrium processing. By using the correction method disclosed by the application, the frequency deviation of the frequency domain data can be effectively eliminated, and the data receiving performance is improved.

The present invention proposes an automatic calibration circuit for a high-stable time-base oscillator, including: a control system, an FPGA control unit, a D / A conversion unit, and a stabilized power supply generation unit; the FPGA control unit detects the current frequency of the crystal oscillator, output offset value; the control system performs rough adjustment and high-precision calibration on the frequency of the crystal oscillator; the D / A conversion unit receives the aging rate DAC array output by the control system, converts it into an analog signal, and outputs EFC The voltage is sent to the voltage tuning terminal of the crystal oscillator; the stable voltage power generation unit includes a switching power supply and a linear stable power supply, and outputs a reference voltage to the reference terminal of the D / A conversion unit. The high-stable time-base oscillator automatic calibration circuit of the present invention eliminates the dependence on external precision reference signals and the frequency offset caused by the aging rate of crystal oscillators in other calibration methods.