459results about "Variable inductances/transformers" patented technology

A power supply system is provided, having: a primary side coil; a power transmission apparatus having a primary side circuit for feeding a pulse voltage resulted from switching a DC voltage which is obtained by rectifying and smoothing a commercial power supply to the primary side coil; a secondary side coil magnetically coupled to the primary side coil; and power reception equipment having a secondary side circuit for rectifying and smoothing voltage induced across the secondary side coil, wherein there is provided a power adjusting section for adjusting a level of power to be transmitted according to power required by the power reception equipment. The power adjusting section has, in the primary side circuit, a carrier wave oscillation circuit for supplying a carrier wave to the primary side coil, a demodulation circuit for demodulating a modulated signal transmitted from the secondary circuit and received by the primary side coil, and a power change-over section for selecting a level of power to be transmitted according to an information signal from the power reception equipment and demodulated by the demodulation circuit. The power adjusting section has, in the secondary side circuit, a modulation circuit for modulating the carrier wave fed from the carrier wave oscillation circuit and received by the secondary side coil with the information signal from the power reception equipment and transmitting the modulated signal.

A method of manufacturing an on-chip transformer balun includes creating, on a semiconductor substrate, a primary winding having at least one substantially symmetrical primary turn on a first dielectric layer and at least one metal bridge on a second layer. A secondary winding is created on the semiconductor substrate, the secondary winding having at least one substantially symmetrical secondary turn on a third dielectric layer and at least one metal bridge on a fourth dielectric layer. In an alternative embodiment, the primary winding has at least one first primary turn on a first dielectric layer and at least one second primary turn on a second dielectric layer and at least one via that operably connects the first primary turn to the second primary turn. The secondary winding has at least one first secondary turn on a third dielectric layer and at least one second secondary turn on a fourth dielectric layer.

An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors with shields to increase circuit Q. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.

A superconducting current limiting device (30) comprising: an interconnected high magnetic permeability structure including a central core (50) interconnected to at least a first and second arm (31, 32) branching off therefrom; a superconductive coil (33, 34) surrounding the central core for biasing the central core; a first alternating current coil (36, 37) surrounding the first arm and interconnected to an alternating current source; a second alternating current coil (38, 39) surrounding a second arm and interconnected to an alternating current load; the first and second alternating current coils being magnetically coupled to the central core wherein the device operates so as to limit the current passing through the device upon the occurrence of a fault condition in the load.

A DC-DC converter includes an insulating substrate with an inductor provided on the top surface thereof, a switching control IC provided therein, and a ground electrode pattern provided on the bottom surface thereof. The ground electrode pattern includes a first pattern and a second pattern separated from each other and a bridge pattern that connects the first and second patterns to each other. A capacitor and the switching control IC is connected to each of the first and second patterns. The bridge pattern faces the inductor and has a smaller width than that of the first and second patterns.

A power converter includes a power train with a coupled inductor and a plurality of regulators, and method of forming and operating the same. In one embodiment, the power train includes a coupled inductor including a magnetic core with a common leg, a first leg and a second leg. The coupled inductor also includes a common winding formed around the common leg, and first and second windings. The first winding is formed around the first leg, and is electrically and magnetically coupled to the common winding. The second winding is formed around the second leg, and is electrically and magnetically coupled to the common winding. The power train also includes a first regulator including a first main switch coupled to the first winding and a second regulator including a second main switch coupled to the second winding.