159results about "Electric/magnetic signal storage" patented technology

Method and apparatus for transporting Ethernet data packets via radio frames in a wireless metropolitan area network. A terminal includes a data packet receiver for receiving data packets for communication over a wireless link wherein not every data packet has a same length; a data packet formatting apparatus for formatting the data packets according to radio frames wherein the radio frames each have a same length and wherein the data packets are formatted into the radio frames such that boundaries for the data packets are not necessarily aligned with boundaries for the radio frames; and a wireless transceiver for communicating the radio frames over the wireless link. The packets can be Fast Ethernet packets. The terminal does not convert the Ethernet data packets into a telephony communication protocol or into an asynchronous transfer mode (ATM) protocol prior to communication of the radio frames over the wireless link. The terminal can include a data packet synchronizer for synchronizing the data packets to a clock signal associated with the radio frames. The data packets can be time-division multiplexed into the radio frames. According to another aspect, a method of transporting Ethernet data packets via radio frames includes steps of receiving Ethernet data packets wherein each data packet includes a preamble and a start-of-frame delimiter, stripping off the preamble and start-of-frame delimiter, formatting the packet data according to radio frames, including appending a synch field to the packet data, and appending a length field to the packet data.

A method for transmitting data between a first device and second device is disclosed. The method includes receiving a block of data; dividing the block of data into at least a first packet having a first size and a second packet having a second packet size; transmitting the first packet to a converter, the converter being configured to convert a packet from a first communication protocol to a second communication protocol; and transmitting the second packet to the converter after waiting a predetermined time. The first packet size, the second packet size, and the predetermined time are selected to prevent overflow of a memory of the converter. The second packet size, and the predetermined time are selected to prevent expiration of a timer at the second data bus. The time is associated with data transferred in the first and second packets.

A display driver comprising: a high-speed serial interface circuit which receives a packet from a host device through a high-speed serial bus using differential signals, and outputs a command or data included in the received packet; a driver circuit which drives a main display panel based on the output command or data; and a low-speed serial interface circuit which outputs a command or data to a sub display driver through a low-speed serial bus when the packet received from the host device includes the sub display driver command or data. And the display driver inserts dummy data to the packet to adjust the difference of the transfer rate by inserting a dummy the dummy data. And the display driver adjust the difference of the transfer rate.

A clock synchroniser, and clock and data recovery apparatus incorporating the clock synchroniser, are described, together with corresponding clock synchronisation methods. The clock synchroniser incorporates an elastic buffer. A received clock signal RCK is used to clock data into the buffer, and a locally generated clock LCK is used to clock data out of the buffer. The local clock is synthesised using a PLL, and a fill-level signal from the elastic buffer is used to control to local clock frequency to maintain a desired average quantity of data in the buffer, thereby achieving synchronisation of the received and local clocks. In preferred embodiments the fill-level signal is used to control a variable divider in the feedback path of the PLL, which is supplied with a highly stable reference signal. A synchronised, and low-jitter local clock is thus produced. Preferably, the elastic buffer employs counters of relatively wide word width, and a storage array of much reduced depth, read and write pointers being provided by just a few of the least significant bits of the words.

A method and a computer program product for sample rate conversion that features distributive or hybrid filtering to reduce unwanted artifacts, such as aliasing and the computational requirements to avoid the aforementioned artifacts. The method includes receiving, at a first sample rate, a plurality of data points, associated with a first signal, operating on the plurality of data points to associate the signal with a predetermined set of parameters, with the set of parameters including a first transition band having an image associated therewith; and varying the sample rate associated with the first signal by interpolation with an interpolator having associated therewith a second transition band, with the width associated with the second transition band being a function of a spectral separation between the first transition band and its image, wherein a second signal is produced having a sequence of data samples approximating the first signal.

A communication device includes a transmitter and a first idle detector. The transmitter is adapted to transmit digital data. The digital data includes user data. The transmitter includes a first idle symbol buffer for storing a first idle symbol. The first idle detector is adapted to detect an absence of user data. The transmitter is adapted to transmit the first idle symbol in response to detecting the absence of user data. A method for transmitting data includes defining a first idle symbol. The user data is stored in a buffer. The user data is modulated to generate a user symbol. An absence of user data in the buffer is detected, and the first idle symbol is transmitted in response to detecting the absence of user data.

A method and apparatus for converting bursty, packetized data traffic from a wide bandwidth network to a constant, average rate traffic on a payload network having a narrower bandwidth is disclosed. The method includes converting a packet burst received from the wide bandwidth network to a serial stream having first and second pluralities of bytes, the second plurality of bytes having only idle bytes; substituting a place keeping flag for said second plurality of bytes thereby providing a reduced data; encapsulating the reduced data in a second packet; and providing the second packet to the narrower bandwidth network at a constant, average traffic rate. The method also includes converting the second packet received from the narrower bandwidth network to a second serial stream; substituting a plurality of idle bytes for the place keeping flags; converting the second serial stream and substituted idle bytes to a third packet; and providing the third packet to the wide bandwidth network.

The invention is a system and method to allow precise control of the transmit packet rate between two different networks and to optionally introduce a priority servicing scheme across several related output ports of a switch engine. The invention employs flow control circuitry to regulate data packet flow across a local interface within a single device by asserting back-pressure. Specifically, flow control is used to prevent a switch port from transmitting a data packet until a subsequent processing stage is ready to accept a packet via that port. The downstream node only permits transmission of packets from the switch when its buffer is available. An interface block effectively multiplexes together multiple switch ports by maintaining constant back-pressure on all of the ports and then releasing the back-pressure, one port at a time, to see if a port has a packet to transmit. This use of back-pressure to control the flow of data packets also allows a priority servicing scheme to be implemented by controlling the sequence of releasing back-pressure to the ports and also the number of packets allowed out of a port when it is allowed to transmit.

A method and apparatus for buffering data samples in a software-based ADSL modem. The method includes generating data for transmission to a remote source and modulating the data to form a plurality of data symbols for transmission. The data symbols are stored in a buffer. An absence of a data symbol in the buffer is determined. In response to detecting an absence of a data symbol in the buffer, an idle data symbol is transmitted.

An apparatus for transferring data in a non-spread domain to a spread domain. The apparatus comprises a first-in-first-out (FIFO) memory; a write pointer generator adapted to generate a write pointer for writing data into the FIFO memory in response to a non-spread clock signal; a spread-clock generator adapted to generate a spread clock signal based on the non-spread clock signal; a read pointer generator adapted to generate a read pointer for reading data from the FIFO memory in response to the spread clock signal; and a controller adapted to control the spread-clock generator in response to the read and write pointers indicating predetermined potential data overflow or underflow of the FIFO memory.

A clock rate used in rendering broadcast streaming audio / video data is adjusted to converge on a clock rate associated with broadcasting the streaming data. The clock rate is adjusted by monitoring the buffer depth associated with a receive buffer that stores the incoming streaming data. The buffer depth provides an estimate of clock drift between the two clock rates. From the estimate of clock drift, the clock rate used in rendering broadcast streaming data is adjusted to avoid the clock drift causing skips or pauses in the rendered audio / video data.

A sample rate converter and a method of converting a sample rate are disclosed herein. The sample rate converter includes a data delay unit, a clock rate conversion unit, a Lagrange polynomial filter unit, a resample position calculation unit, and a resample position compensation unit. The data delay unit delays signals in response to an input clock signal. The clock rate conversion unit converts the sample rate of the signals. The Lagrange polynomial filter unit performs a filtering function on the signals whose rate has been converted. The resample position calculation unit outputs the value (Dint, dfrac) of the resample position of the signals based on a set resample ratio value. The resample position compensation unit corrects the error value of the signals by applying the value (Dint, dfrac) to the signals, and outputs a final signal.

A switchboard device and methods of operation of same are disclosed. Embodiments of the invention may provide a flexible means of interconnecting wideband and narrowband communications interfaces, where wideband communications interfaces may transfer wideband data sampled at a higher sampling rate, and narrowband communication interfaces may transfer narrowband data sampled at a lower sampling rate. Data streams sampled at different sampling rates can be combined and the sampling rate of the result adjusted as needed by the destination interface. Methods of operating embodiments of the present invention are included. An additional aspect of the present invention may include machine-readable storage having stored thereon a computer program having a plurality of code sections executable by a machine for causing the machine to perform the foregoing.