104 results about "Dynamic noise" patented technology

A speech enhancement system improves the speech quality and intelligibility of a speech signal. The system includes a time-to-frequency converter that converts segments of a speech signal into frequency bands. A signal detector measures the signal power of the frequency bands of each speech segment. A background noise estimator measures a background noise detected in the speech signal. A dynamic noise reduction controller dynamically models the background noise in the speech signal. The speech enhancement renders a speech signal perceptually pleasing to a listener by dynamically attenuating a portion of the noise that occurs in a portion of the spectrum of the speech signal.

Provided are an apparatus and method for speech segment detection, and a system for speech recognition. The apparatus is equipped with a sound receiver and an image receiver and includes: a lip motion signal detector for detecting a motion region from image frames output from the image receiver, applying lip motion image feature information to the detected motion region, and detecting a lip motion signal; and a speech segment detector for detecting a speech segment using sound frames output from the sound receiver and the lip motion signal detected from the lip motion signal detector. Since lip motion image information is checked in a speech segment detection process, it is possible to prevent dynamic noise from being misrecognized as speech.

The invention provides a high-precision successive approximation type analog-digital converter and a performance lifting method based on a DNL (dynamic noise limiter). The high-precision successive approximation type analog-digital converter comprises a redundancy weight capacitor array, a comparator, a coding and reconstructing circuit, a weight storage circuit and a control logic circuit, wherein the redundancy weight capacitor array is used for acquiring an input voltage on a sampling stage to generate an output voltage, and realizing voltage addition and subtraction operation by controlling the corresponding weight capacitor of the redundancy weight capacitor array according to the comparator output results on the conversion stage; the comparator is used for comparing the output voltage of the redundancy weight capacitor array; the coding and reconstructing circuit is used for calculating an output code of the successive approximation type analog-digital converter according to the comparator output results and the capacitor weight in the weight storage circuit; the weight storage circuit is used for capacitor weight; the control logic circuit is used for controlling the sampling and conversion stage of the redundancy weight capacitor array. The invention further provides the performance lifting method based on the DNL (dynamic noise limiter). According to the high-precision successive approximation type analog-digital converter provided by the invention, the digital correction of capacitor mismatch errors is realized by adopting the capacitor array with the redundancy weight, and the conversion speed and the linear speed are increased.

Homomorphic evaluation of a function is performed on input ciphertext(s), which were encrypted using a public key of an encryption scheme that also includes multiple secret keys. Each input ciphertext includes multiple real numbers that are kept with finite precision. Performing the homomorphic evaluation of the function includes performing operation(s). Performing each of one or more operations includes the following. A key-switching transformation is performed on selected ciphertext(s), including converting a first version of a selected ciphertext with respect to a first of the secret keys and with some number r bits of precision to a second version of the selected ciphertext with respect to a second of the secret keys and with some other number r′ bits of precision, r′>r. Each key switching transformation is performed prior to or after the operation(s) are evaluated. Results of the operation(s) are output.