142 results about "Printed circuit board design" patented technology

A Virtual Design Module (VDM) used in a networked design environment generates manufactured product designs that are near optimal in terms of cost and production cycle time by using design data files containing alternative parts and manufacturers information. Numerous product design alternatives are considered and evaluated in terms of design-manufacturing-parts-supplier feasibility and real-time information on cost and production cycle time for realization. The VDM generates a population of new designs with appropriate board design information to allow for design-manufacturer-supplier decision making and determines the feasibility of each member of the current generation of designs and rejects designs that are not feasible. The VDM triggers Mobile Software Agents (MSA) that obtain data for parts availability, cost, lead time and manufacturer data for manufacturing availability, cost and lead time for each feasible member of the current generation of designs and return the data. In one application for printed circuit board design, the VDM evaluates each member of the current generation of designs by calculating cost, lead-time and value using a J function. The VDM then improves board designs through selection and use of board design modifiers. The process continues until optimized designs are obtained. Optimized board designs are output as results to an operator.

Multiple users simultaneously edit at least a portion of a printed circuit board (PCB) design. The PCB design portion is transmitted to first and second clients for graphical display at each of the clients. A first protection boundary is associated with an area of the PCB design being edited at the first client. A second protection boundary is associated with an area of the PCB design being edited at the second client. The first and second protection boundaries are displayed at each of the first and second clients. A request from one of the clients to edit an object within a region bounded by a protection boundary associated with the other client is rejected. The protection boundary may surround a user's cursor. The size of the boundary may increase based on editing activity by a user in an area of a PCB design.

Multiple users may simultaneously edit a shared area of a printed circuit board design. In order to prevent conflicts between multiple users, a user draws a protection border around a portion of his or her workspace so as to temporarily reserve the protected portion and prevent editing by other users. The protection border may be broadcast to other users. The protection border may also define a protected region in which a user may evaluate alternative design changes without requesting corresponding changes to a master PCB design.

A printed circuit board design system performs, with a 3D-CAD system, a mounting design including a cabinet. In order to prepare, without mistakes in less man-hours, an accurate 3D model of a printed circuit board provided to the 3D-CAD system, a converter converts the printed circuit board into a unit-type model, a division-type model, a single-type model, and a library-type model composed of one or more models based on attributes preliminarily added to a mounting component stored in a mounting design DB storage.

In accordance with aspects of the present invention, a programmable power management integrated circuit is presented. An integrated circuit can include a plurality of cells, each cell including at least one driver for a switchable element; and a switch matrix and controller coupled to the plurality of cells, the switch matrix and controller being programmable to configure at least one power channel, each power channel including at least one cell of the plurality of cells. A method of providing a power management system using the integrated circuit includes receiving power requirements corresponding to a target device; providing implementation options to achieve the power requirements; selecting a solution from the implementation options; generating a programming file for a power management integrated circuit, and generating a printed circuit board design for the power management integrated circuit.

A printed circuit wiring board designing support device includes a layout data receiving section receiving printed circuit board layout data through an input / output section, a section for extracting structures of power supply / ground planes, a via hole extracting section for extracting a via hole interconnecting the wirings extending over power supply / ground planes, a capacitor extracting section for extracting a capacitor connected between power supply / ground planes, a distance measuring section for measuring the distance between the via hole and the capacitor, a database where the allowable distance value between the via hole and the capacitor in respect to the distance between the power supply and ground planes is recorded, an examination section for comparing the capacitor / via hole distance with the allowable distance value, and a warning section for issuing a warning when the distance between the via hole and the capacitor is larger than the allowable distance value.

A printed circuit board (PCB) is disclosed. The PCB includes a substrate have a top surface and a bottom surface. A first conductive layer is disposed on the top surface of the substrate. The first conductive layer comprises a first signal net and a second signal net. An outermost insulating layer is disposed on the top surface of the substrate to cover the substrate and the first conductive layer. The outmost insulating layer comprises an opening to expose a portion of the second signal net. And, a second conductive layer is disposed on the outermost insulating layer and substantially covering at least a portion of the first signal net. The second conductive layer is filled into the opening to electrically connect to the second signal net which is able to provide one of a ground potential and a power potential.

Techniques for automating test pad insertion in a printed circuit board (PCB) design and fixture probes insertion in a PCB tester fixture are presented. A probe location algorithm predictably determines respective preferred probing locations from among respective sets of potential probing locations associated with a number of respective nets in a PCB design. Test pads, preferably in the form of bead probes, are added to the PCB design at the respective preferred probing locations along with, where feasible, one or more alternate probing locations chosen from among remaining ones of the respective sets of potential probing locations. During fixture design, nets with multiple test pads implemented in the PCB design are processed by the same probe location algorithm used during PCB design to determine the associated preferred probing location and any associated alternate probing locations for said respective nets. Fixture probes are preferably inserted in the PCB tester fixture design at respective preferred probing locations to exactly align with corresponding preferred test pads of a PCB implemented in accordance with the PCB design should the PCB be mounted in a printed circuit board tester fixture implemented in accordance with the PCB tester fixture design.

A printed circuit board analyzing system for analyzing the whole circuit of a multilayer printed circuit board to perform circuit analysis of noise propagation in the printed circuit board having structure in which the shapes of stacked conductor planes are different or planes are provided side by side in the same layer by quickly providing an adjacent interference part equivalent circuit model representing noise interference parts causing interference between adjacent opposed planes and by coupling the plane pairs to the adjacent interference part equivalent circuit.

A camera module including an objective lens housing with an optical system, an image sensor chip with wire bonding connections, and a printed circuit board for contacting the image sensor chip. The printed circuit board is designed with wire bonding areas to which the wire bonding connections of the image sensor chip are connected, and the assembly made up of the image sensor chip and the printed circuit board is designed in such a manner that the image sensor chip is focus-adjusted to the optical system by changing its position relative to the printed circuit board taking advantage of the flexibility of the wire bonding connections of the image sensor chip. The invention further relates to a method of manufacturing the camera module.

A planar induction sensor for sensing of security features of documents having changing magnetic and (or) conducting properties is of a multilayer printed circuit board design. The sensor comprises a planar current transformer with a spiral-type primary coils and one or several turns of secondary coil in an adjacent layer of the printed circuit board. The secondary coil of the current transformer is connected to an operating coil, which is situated at a sensing edge of the sensor. The operating coil can be formed by external wires or can be incorporated in the circuit board of the current transformer. When a security element, made from the magnetic or conductive material moves past the sensing edge of the sensor, a change in inductance of the induction sensor occurs. In a preferred embodiment, two induction sensors with individual associated electronic circuits were located on opposite sides of validator channel. Analysis of both signals from the sensors allows correction of the signal to reduce variation caused by changing distance of the security document from each sensor.

An element placement check system for checking element placement on a printed wiring board having wiring by which a power supply terminal of an integrated circuit and a power supply decoupling element for the power supply terminal are connected on a mounting surface on which the integrated circuit is mounted, wherein the wiring is connected to a power supply plane for providing a direct current power supply to the power supply terminal through a power supply via hole, including: element distance detecting means detecting a first wire length between the power supply decoupling element and the power supply terminal; power supply via hole distance detecting means detecting a second wire length between the power supply via hole and the power supply terminal; and determination means determining a positional relationship of the power supply decoupling element and the power supply via hole to the power supply terminal based on the first and second wire lengths, thereby providing a check system and a printed wiring board design system capable of checking a connection sequence of a power supply decoupling element such as a bypass capacitor and the power supply via hole connected to the power supply plane feeding a direct current power supply to the power supply terminal as viewed from the power supply terminal of an integrated circuit.

A synchronous memory system configurable in a multiplexed or non-multiplexed mode. In the multiplexed mode, address and data are provided on a shared bus, and accesses to the memory system are qualified by memory access control signals, including an address strobe signal, a counter enable signal and a counter repeat signal. A read / write control signal is maintained for one cycle after the last valid access command to avoid bus turn-around problems. In the multiplexed mode, chip enable and output enable signals may be constantly activated, thereby simplifying associated printed circuit board design. Different ports of the synchronous memory system can be independently configured to operate in either the multiplexed or non-multiplexed mode.

Multiple users simultaneously edit at least a portion of a printed circuit board (PCB) design. The PCB design portion is transmitted to first and second clients for graphical display at each of the clients. A first protection boundary is associated with an area of the PCB design being edited at the first client. A second protection boundary is associated with an area of the PCB design being edited at the second client. The first and second protection boundaries are displayed at each of the first and second clients. A request from one of the clients to edit an object within a region bounded by a protection boundary associated with the other client is rejected. The protection boundary may surround a user's cursor. The size of the boundary may increase based on editing activity by a user in an area of a PCB design.

A method for generating a printed circuit board design module is provided. The method includes compiling information that is usable to derive one of more low level details associated with a printed circuit board, determining one or more high level constraints that are usable with the information to generate the low level details, and generating the printed circuit board design module such that the printed circuit board design module includes the information and such that the printed circuit board design module is configured to receive the one or more high level constraints.

To automatically arrange vias on a printed circuit board so as to satisfy a predetermined condition. A printed circuit board design support method for causing a computer to execute a ground conductive area identifying conductive areas which can be used as grounds of a printed circuit board having a plurality of condicutive layers, an extracting an overlapping conductive area in which the conductive areas identified in the ground conductive area identifying are two-dimensionally overlapped with one another, and an automatic arranging interlayer connection members configured to electrically connect at least two layers with one another among the plurality of conductive areas in the overlapping conductive area extracted in the extracting at an interval within a predetermined distance.

A method of probing printed circuit boards that includes providing a circuit board design including a plurality of probe points, and selecting a probe point including a location ink from the plurality of probe points in the circuit board design to be probed on a physical printed circuit board design. The method continues with probing at least one probe point of the plurality of probe points with a probe that activates the location ink. Activation of the location ink by the probe indicates the selected probe point including the locating ink.

This invention relates to a PCB design reuse method. It contains determining every function module containing device and function module with same position information, making PCB design to store relative design information, when making PCB design to other same function module it can be done according to stored design information. Said invention raises PCB design efficiency. And has convenient operation.

An escape outline is provided to automatically identify escape traces of a breakout. Further, the escape outline can be used to associate desired properties with the identified escape traces and allows special behavior of the automatic and interactive routing routines that operate on the escapes. Still further, an escape outline may be employed to improve the creation of escape traces by automatic routing tools. The use of pseudo-pins for netline optimization also is provided. Breakouts in a printed circuit board design are analyzed, and their respective endpoints are identified. These endpoints are then employed in a netline optimization analysis instead of the pins from which the breakouts originate. In this manner, the endpoints of the breakout are used as pseudo-pins to substitute for the actual pins of a component. Because the netline optimization will then be predicated upon the breakout endpoints rather that the originating pins, the pin configuration will be revised to simplify routing to the breakouts.

In accordance with aspects of the present invention, a programmable power management integrated circuit is presented. An integrated circuit can include a plurality of cells, each cell including at least one driver for a switchable element; and a switch matrix and controller coupled to the plurality of cells, the switch matrix and controller being programmable to configure at least one power channel, each power channel including at least one cell of the plurality of cells. A method of providing a power management system using the integrated circuit includes receiving power requirements corresponding to a target device; providing implementation options to achieve the power requirements; selecting a solution from the implementation options; generating a programming file for a power management integrated circuit, and generating a printed circuit board design for the power management integrated circuit.

A printed wiring board design method including the steps of designing placement and wiring for circuit components based on circuit information on a mounting surface of the board; excluding a placement region and a wiring region for the circuit components from the mounting surface to thereby calculate a placement and wiring enable region for an EMC component in which the EMC component can be placed and wiring can be laid down; and calculating the placement and wiring range for the EMC component based on an EMC design rule from the calculated placement and wiring enable region for the EMC component, thereby providing a printed wiring board design method in which a placement of and wiring for a new bypass capacitor or the like can be implemented and a region satisfying restraint items from the design rule can be clearly displayed as a new input enable region on a CAD screen.

The invention relates to the provision of electrical apparatus which has at least one printed circuit board on which electrical components are set out and a first format of connection type exposed to allow connection of further apparatus. The connections can be attached directly to further apparatus with the same connector format and allow transfer of data between further electrical apparatus or alternatively, at the time of manufacturing an adaptor can be provided which has connectors of the same format as those on the printed circuit board for connection with the said printed circuit board and a series of output connectors of a different format which can be exposed for the selective connection thereto of phono or other format connectors. This therefore allows a common printed circuit board design to be used for electrical apparatus for sale in any market, regardless of the particular type of connectors which are used to connect the printed circuit board to other pieces of apparatus in that market and a decision to be made by the manufacturer at the time of manufacture as to whether or not to connect the adaptor dependent on the ultimate destination of the apparatus.

A printed circuit board design system performs, with a 3D-CAD system, a mounting design including a cabinet. In order to prepare, without mistakes in less man-hours, an accurate 3D model of a printed circuit board provided to the 3D-CAD system, a converter converts the printed circuit board into a unit-type model, a division-type model, a single-type model, and a library-type model composed of one or more models based on attributes preliminarily added to a mounting component stored in a mounting design DB storage.

A method according to one embodiment includes receiving a printed circuit board design in a memory; generating, using a processor, multiple schematic windows of the printed circuit board design; generating, using the processor, multiple layout windows of the printed circuit board design; and outputting the multiple schematic windows of the printed circuit board design simultaneously with outputting the multiple layout windows of the printed circuit board design. A first of the schematic windows is paired with a first of the layout windows, the paired windows depicting representations of a common sub-portion of the printed circuit board design.

Aspects of the invention are directed towards placing components within a layout design for a PCB. More specifically, various implementations of the invention provide methods and apparatuses that can dynamically adjust the shape or placement of component groups during an HGP process. With some implementations of the invention, an HGP process for planning the layout of a PCB is provided. Furthermore, component groups, which conflict, geographically, with either another component group or some other object within the layout design are allowed to be placed during the planning process. Subsequently, the placement locations for one or both of the conflicting component groups are adjusted to resolve the conflict. In some implementations, the geometric boundary, or footprint, of one or both of the component groups is adjusted to resolve the conflict.

Techniques for automating probing location selection during printed circuit board (PCB) and corresponding PCB tester fixture design are presented. The invention includes a system and algorithm for selecting a probe layout comprising a set of probing locations for a printed circuit board design having a plurality of nets, at least some of which have a number of alternative possible probing locations. The system and algorithm iteratively generates a potential probe layout comprising one or more probing locations per net, and based on the potential probe layout, determines one or more regions of maximum deflection. A probing location from the potential probe layout that is located in a region of maximum deflection and is associated with a net having one or more alternative probing locations is removed from the potential probe layout and replaced in the with one of the one or more alternate probing locations associated with the net. Regions of maximum deflection are recalculated based on the modified potential probe layout, and the replacement process is repeated until respective magnitudes of the respective areas of maximum deflection are below a threshold value.

A method used for supporting designing of a printed circuit board including a plurality of conductive layers having conductive areas to which a constant potential is applied, includes specifying conductive areas having a predetermined wiring from the conductive areas for each of the plurality of conductive layers, extracting areas that overlap each other in a planar view from the specified conductive areas, specifying an interlayer connection member that electrically connects at least two of the plurality of conductive layers in the extracted area, and clearly specifying an area within a predetermined distance from a center of the specified interlayer connection member and in the extracted area.