33results about How to "Suppression of drop in withstand voltage" patented technology

A wide band gap semiconductor device is disclosed. A first trench in a gate electrode part and a second trench in a source electrode part (Schottky diode part) are disposed so that the first and second trenches are close to each other while and the second trench is deeper than the first trench. A metal electrode is formed in the second trench to form a Schottky junction on a surface of an n-type drift layer in the bottom of the second trench. Further, a p+-type region is provided in part of the built-in Schottky diode part being in contact with the surface of the n-type drift layer, preferably in the bottom of the second trench. The result is a wide band gap semiconductor device which is small in size and low in on-resistance and loss, and in which electric field concentration applied on a gate insulating film is relaxed to suppress lowering of withstand voltage to thereby increase avalanche breakdown tolerance at turning-off time.

A semiconductor device may be provided with a semiconductor substrate, an insulating film disposed on a surface of the semiconductor substrate, at least one electrode disposed on a surface of the insulating film, and a voltage applying circuit configured to apply a first voltage to the at least one electrode. The semiconductor substrate may be provided with a cell region and a non-cell region adjacent to the cell region. The cell region is provided with a semiconductor element, and the non-cell region is provided with a withstand voltage structure. The insulating film may be disposed on a surface of the non-cell region. The at least one electrode may be electrically insulated from the semiconductor substrate. The voltage applying circuit may apply the first voltage to the electrode during at least a part of a first period in which a second voltage is not applied to the semiconductor element.

In a semiconductor substrate of a semiconductor device, a drift layer, a body layer, an emitter layer, and a trench gate electrode are formed. When the semiconductor substrate is viewed in a plane manner, the semiconductor substrate is divided into a first region covered with a heat dissipation member, and a second region not covered with the heat dissipation member. A density of trench gate electrodes in the first region is equal to a density of trench gate electrodes in the second region. A value obtained by dividing an effective carrier amount of channel parts formed in the first region by an area of the first region is larger than a value obtained by dividing an effective carrier amount of channel parts formed in the second region by an area of the second region.

A semiconductor device includes a semiconductor substrate; a first semiconductor region that includes an extension portion extending in a specific direction at a specific width as viewed along a direction orthogonal to the main surface; a second semiconductor region that is shaped to include a portion running along the extension portion of the first semiconductor region as viewed along the direction orthogonal to the main surface; a field relaxation layer that relaxes a field generated between the first semiconductor region and the second semiconductor region, that is formed on the second semiconductor region side of the main surface, and that is formed by a semiconductor layer; and a conductor that is connected to the second semiconductor region, and that has an end portion on the first conductor region side positioned within the range of the field relaxation layer.

The photomultiplier tube 1 is provided with a casing 5 made of an upper frame 2 and a lower frame 4, an electron multiplying part 33 having dynodes 33a to 331 arrayed on the lower frame 4, a photocathode41, and an anode part 34. Conductive layers 202 are installed on an opposing surface 20a of the upper frame 2. The electron multiplying part 33 is provided with base parts 52a to 52d of the respective dynodes 33a to 33d installed on the side of the lower frame 4, and power supplying parts 53a to 53d connected to the conductive layers 202 at one end parts of the respective base parts 52a to 52d in a direction along the opposing surface 40a. The base parts 52a to 52d are constituted in such a manner that the both end parts are joined to the opposing surface 40a, the central part is spaced away from the opposing surface 40a, and a cross sectional area at the one end part on the side of each of the power supplying parts 53a to 53d is made greater than a cross sectional area at another end part.

A semiconductor device. It aims to solve the following problems: the potential division effect of the capacitive FP is strong, and the depletion layer can easily reach the end of the n-region. It is characterized in that the edge region has: a semiconductor base; a semiconductor region of a second conductivity type opposite to the first conductivity type, which is arranged in the semiconductor base in a pn-bonded manner; and a conductor layer above and on the semiconductor region. A plurality of the conductor layers are arranged side by side above the region outside the semiconductor region, the conductor layer is insulated from the semiconductor region and the region outside the semiconductor region, and the conductor layer above the region outside the semiconductor region is separated from the upper surface of the region outside the semiconductor region The distance between them is greater than the distance between the conductor layer above the semiconductor region and the upper surface of the conductor region. The distance between the conductor layer above the semiconductor base and the upper surface of the semiconductor base is greater than the distance between the conductor layer above the semiconductor region and the upper surface of the semiconductor region.

The purpose of the present invention is to suppress a drop in withstand voltage of a power semiconductor device. A semiconductor base (11) has: an n-type semiconductor substrate (3); and at least one p-type diffusion layer (4) which is formed so as to be separated from each other on a surface layer on the first main surface (S1) side of the semiconductor substrate (3) in the termination region (2). The power semiconductor device (101) has at least one insulating film (25) formed on the first main surface (S1) of the semiconductor base body (11) between the insulating films (5, 15). The semi-insulating film (8) is in contact with the insulating film (25) on the insulating film (25), and is in contact with the first main surface (S1) in at least two or more regions between the insulating films (5, 15) in which the insulating film (25) is not formed.