39results about How to "Reduce dark lines" patented technology

The invention provides an array substrate and a liquid-crystal display panel, wherein the array substrate comprises an underlayer substrate, a first metal layer, a color resistance layer, a black matrix layer and a transparent conductive layer; the color resistance layer comprises a plurality of colorful film color resistances; two adjacent colorful film color resistances are set at interval. By adopting the array substrate and the liquid-crystal display panel provided herein, the colorful film color resistances are set at interval, thus avoiding overlapping between the colorful film color resistances; further the surface of the array substrate is flattened; and dark fringe is reduced.

The invention discloses a glass substrate having a black matrix. The glass substrate having the black matrix comprises a glass substrate and a black matrix array formed thereon, wherein the thickness of the black matrix gradually reduces from the middle to its two ends. The preparation method of the glass substrate comprises the following steps: S101, providing a glass substrate and forming a black matrix film layer thereon; S102, applying an exposure process and a development process to the black matrix film layer to obtain the black matrix array, wherein the exposure photomask is corresponding to the exposure area of each black matrix during the exposure process, and the exposure quantity gradually reduces from the middle to the two ends. The invention also discloses a liquid crystal panel containing the glass substrate and integrating a color filter on a thin film transistor array substrate (Color filter on array, COA).

The present application discloses a liquid crystal display panel and a liquid crystal display device. The liquid crystal display panel includes a display area; the display area includes: at least one first pixel area, the first pixel area is divided into a plurality of first sub-pixel units, and a GOA circuit is arranged in the first sub-pixel unit; and a second pixel area, the second pixel area is divided into a plurality of second sub-pixel units, and no GOA circuit is set in the second sub-pixel units; wherein, the number of pixel domains of the first sub-pixel unit is less than and The number of pixel domains of the second sub-pixel unit. In the present application, by reducing the number of pixel domains of the sub-pixel unit provided with the GOA circuit, the transmittance is improved, and the performance of the liquid crystal display panel is improved.

The invention provides an array substrate and a liquid crystal display panel, comprising an insulating layer and an indium tin oxide semiconductor layer arranged on the insulating layer, the upper side of the indium tin oxide semiconductor layer is in contact with the liquid crystal, and the array substrate further includes a plurality of For the sub-pixel unit below, the indium tin oxide semiconductor layer includes a plurality of first regions whose number is the same as that of the sub-pixel unit, wherein the size of the first region is the same as that of the sub-pixel unit, and the first region is the same as the number of the sub-pixel unit. The units are arranged in one-to-one correspondence, and a first groove is provided in the middle of at least one first region, and the first groove is cross-shaped. The invention can reduce the dark lines in each sub-pixel and improve the light transmittance.

The invention relates to a substrate having a multi-domain vertical alignment pixel structure, a fabrication method of the substrate, an LCD( liquid crystal display) panel and an LCD device. The substrate faces an opposite substrate having a common electrode, and a liquid crystal layer is located between the substrate and the opposite substrate. The substrate comprises a scan line, a data line, an active component, a first and second patterned pixel electrode, and a voltage reduction layer, wherein the substrate is divided into a plurality of pixel regions by the scan line and the data line; the active component is electrically connected with the scan line and the data line; the first patterned pixel electrode is electrically connected with the active component; the voltage reduction layer is arranged on the first patterned pixel electrode; the second patterned pixel electrode is arranged above the first patterned pixel electrode, and is electrically connected with the active component; the first patterned pixel electrode and the second patterned pixel electrode have the identical potential, and respectively provide a first electrical field and a second electrical field to the liquid crystal layer; and the first electrical field is weaker than the second electrical field due to the existence of the voltage reduction layer.