2599results about "Circuit arrangements on support structures" patented technology

A spinal cord stimulation (SCS) system includes multiple electrodes, multiple, independently programmable, stimulation channels within an implantable pulse generator (IPG) which channels can provide concurrent, but unique stimulation fields, permitting virtual electrodes to be realized. The SCS system includes a replenishable power source (e.g., rechargeable battery), that may be recharged using transcutaneous power transmissions between antenna coil pairs. An external charger unit, having its own rechargeable battery can be used to charge the IPG replenishable power source. A real-time clock can provide an auto-run schedule for daily stimulation. An included bi-directional telemetry link in the system informs the patient or clinician the status of the system, including the state of charge of the IPG battery. Other processing circuitry in the IPG allows electrode impedance measurements to be made. Further circuitry in the external battery charger can provide alignment detection for the coil pairs.

A telecommunications cabinet comprising a top, a floor, a pair of opposing sides, a front wall and a rear wall defining an interior, the front including an access door for accessing the interior. Within the interior are mounted a cable management structure, an adapter panel with an adapter configured to optical connector two optical fiber cables terminated with fiber optic connectors, and a fiber optic connector holder mounted in openings of the adapter panel. The connector holder has an opening configured to receive a fiber optic connector with a dust cap, the opening accessible from a front side of the adapter panel. A fiber optic connector including a ferrule with a polished end face holding an end of an optical fiber with a dust cap placed about the ferrule and polished end face is inserted within the opening of a fiber optic connector holder. And a fiber optic connector is inserted within the rear side of one of the adapters.

System-in packages, or multichip modules, are described which can include multi-layer chips and multi-layer dummy substrates over a carrier, multiple through vias blindly or completely through the multi-layer chips and completely through the multi-layer dummy substrates, multiple metal plugs in the through vias, and multiple metal interconnects, connected to the metal plugs, between the multi-layer chips. The multi-layer chips can be connected to each other or to an external circuit or structure, such as mother board, ball grid array (BGA) substrate, printed circuit board, metal substrate, glass substrate, or ceramic substrate, through the metal plugs and the metal interconnects.

A telecommunications cabinet comprising a top, a floor, a pair of opposing sides, a front wall and a rear wall defining an interior, the front including an access door for accessing the interior. Within the interior are mounted a cable management structure, an adapter panel with an adapter configured to optical connector two optical fiber cables terminated with fiber optic connectors, and a fiber optic connector holder mounted in openings of the adapter panel. The connector holder has an opening configured to receive a fiber optic connector with a dust cap, the opening accessible from a front side of the adapter panel. A fiber optic connector including a ferrule with a polished end face holding an end of an optical fiber with a dust cap placed about the ferrule and polished end face is inserted within the opening of a fiber optic connector holder. And a fiber optic connector is inserted within the rear side of one of the adapters.

A microelectronic unit includes a carrier structure having a front surface, a rear surface remote from the front surface, and a recess having an opening at the front surface and an inner surface located below the front surface of the carrier structure. The microelectronic unit can include a microelectronic element having a bottom surface adjacent the inner surface, a top surface remote from the bottom surface, and a plurality of contacts at the top surface. The microelectronic element can include terminals electrically connected with the contacts of the microelectronic element. The microelectronic unit can include a dielectric region contacting at least the top surface of the microelectronic element. The dielectric region can have a planar surface located coplanar with or above the front surface of the carrier structure. The terminals can be exposed at the surface of the dielectric region for interconnection with an external element.

Disclosed are appendage mountable electronic systems and related methods for covering and conforming to an appendage surface. A flexible or stretchable substrate has an inner surface for receiving an appendage, including an appendage having a curved surface, and an opposed outer surface that is accessible to external surfaces. A stretchable or flexible electronic device is supported by the substrate inner and / or outer surface, depending on the application of interest. The electronic device in combination with the substrate provides a net bending stiffness to facilitate conformal contact between the inner surface and a surface of the appendage provided within the enclosure. In an aspect, the system is capable of surface flipping without adversely impacting electronic device functionality, such as electronic devices comprising arrays of sensors, actuators, or both sensors and actuators.

Docking stations and docking methods are provided for use with marking devices used for marking the presence or absence of an underground facility in a dig area. The docking station may serve as a home base for storage of a marking device, for charging the battery of a marking device, for transferring data to and from a marking device, and for securing a marking device against unauthorized use and / or theft. The docking station may be a mobile docking station that is installed in a vehicle or may be a fixed docking station that is installed at a central location in the field, at a central office, at a home base facility, and the like.

Docking stations and docking methods are provided for use with marking devices used for marking the presence or absence of an underground facility in a dig area. The docking station may serve as a home base for storage of a marking device, for charging the battery of a marking device, for transferring data to and from a marking device, and for securing a marking device against unauthorized use and / or theft. The docking station may be a mobile docking station that is installed in a vehicle or may be a fixed docking station that is installed at a central location in the field, at a central office, at a home base facility, and the like.

The invention relates to an intensive assembling cabinet for large semiconductor equipment. The intensive assembling cabinet comprises a cabinet frame, an outer shell which is wrapped on the periphery of the cabinet frame, and an internal frame arranged in the cabinet frame. The internal frame divides the cabinet frame into a first radiating channel placed on the upper side, a power supply part and a control cabinet, wherein the power supply part and the control cabinet are placed on the lower side and are distributed left and right. The power supply part is connected with the control cabinet through a cable, the power supply part is placed in a stacking mode, and a maintenance space is reserved between the power supply part and the control cabinet. The control cabinet is in a self-rotating mode. According to the intensive assembling cabinet for the large semiconductor equipment, the front face and the back face of the power supply part are maintained through organization layout and the reserved maintenance space, and the rotating function of the control cabinet in the self-rotating mode is used for maintaining the front face and the back face of the control cabinet. The first radiating channel is used for pumping and draining the heat of the power supply part and the control cabinet. Meanwhile, space units for radiating, maintaining and cable placing are merged, and therefore intensive assembling is achieved.

A memory architecture includes a first substrate containing multiple memory devices and a first channel portion extending across the first substrate. The architecture further includes a second substrate containing multiple memory devices and a second channel portion extending across the second substrate. A connector couples the first channel portion to the second channel portion to form a single channel. The connector includes a first slot that receives an edge of the first substrate and a second slot that receives an edge of the second substrate. Another connector has a pair of slots that receive opposite edges of the first and second substrates. The channel portions extend across the substrates in a substantially linear path. Each channel portion includes multiple conductors having lengths that are approximately equal.

The metallic case of a power conversion apparatus includes a casing having a side wall, as well as an upper case and a lower case, a first area being formed between a cooling jacket provided at the inner periphery of the side wall and the lower case, the metal base plate dividing the first area between the cooling jacket and the upper case into a lower side second area and an upper side third area, first and second power modules being fastened to a top surface and a capacitor module being provided in the first area, driving circuits that drive inverter circuits of the power modules respectively being provided in the second area, and a control circuit that controls the driver circuits being provided in the third area.

A printed circuit board is disclosed. A top layer power supply pattern and a top layer ground pattern are formed. The top layer power supply pattern and the top layer ground pattern are connected to a power supply layer and a ground layer through a plurality of viaholes, respectively. A plurality of capacitors or a plurality of capacitor resistor series circuits are disposed at predetermined intervals between the top layer power supply pattern and the top layer ground pattern.

A ball grid array package comprises a substrate having a first surface and a second surface, a chip, an insulating material, and a solder ball. The surface of the substrate comprises ball pads, conducting traces, and solder masks wherein the conducting traces are disposed in between the adjacent ball pads, and are covered by the solder mask, in addition, a portion of each of the ball pads is also covered by the solder mask. The solder mask includes an opening positioned in the area corresponding to the ball pads wherein the opening exposes a portion of the surface the ball pad and a portion of the side wall of the ball pad. The chip is disposed on the second surface of the substrate, and is sealed and encapsulated by the insulated material. The solder balls are disposed on the first surface of the substrate, and are positioned at the openings of the ball pads. Additionally, the solder balls are electrically connected to a portion of the surface of the ball pads and a portion of the side wall of the ball pads disposed at the ball pad openings.

An electronic device is disclosed that includes a band, a functional layer disposed over the band, neutral mechanical surface adjusting layers disposed over a portion of the functional layer, and encapsulating layers disposed over the neutral mechanical surface adjusting layers. The band includes a bistable structure having an extended conformation and a curved conformation. The functional layer includes a device island and a stretchable interconnect coupled to the device island at a junction region. At least one of the neutral mechanical surface adjusting layers can have a property that is spatially inhomogeneous relative to a location in the electronic device. The device island and stretchable interconnect are disposed about the band such that the device island and the junction region are disposed at areas of minimal strain of the electronic device in the curved conformation of the bistable structure.

An accommodation apparatus facilitates the attachment, exchange, operation, and wire configuration of a plurality of communication devices, such as a media converter, and a power unit. The accommodation apparatus comprises a support part fixed to an external frame, and a loading part, movable relative to the support part. The loading part removably accommodates the communication devices, and includes a first surface and a second surface, wherein the transmission medium can be connected to the communication devices through the first and second surfaces.

Methods and apparatus for creating an overall assembly formed from a transparent member and a metal member are disclosed. According to one aspect of the present invention, a method includes positioning a transparent member in a mold configured for insertion molding, and providing a liquid metal into the mold. The method also includes hardening the liquid metal in the mold. Hardening the liquid metal includes binding the metal to the transparent member to create the integral assembly.

Integrated circuit board combining external contact zones and an antenna to receive data transmitted by a terminal, and process for manufacturing such a board.The integrated circuit board in accordance with the invention comprises a single integrated circuit connected both to an antenna by connection terminals and to external contact zones by other connection terminals; the antenna is arranged between a support and a strip; the above-mentioned connection terminals are arranged opposite the corresponding connection ends of the integrated circuit and are respectively connected to them; the integrated circuit is arranged by a process know by the name "flip-chip" in a cavity in which the connection terminals of the antenna and those of the external contact zones are accessible.The board in accordance with the invention may by used both with a reader connected to the external contact zones or with a terminal transmitting data without contacts, by means of the antenna.

Methods and apparatuses for an electronic assembly. The electronic assembly has a first object created and separated from a host substrate. The first object has a first electrical circuitry therein. A carrier substrate is coupled to the first object wherein the first object is being recessed below a surface of the carrier substrate. The carrier substrate further includes a first carrier connection pad and a second carrier connection pad that interconnect with the first object using metal connectors. A receiving substrate, which is substantially planar, including a second electrical circuitry, a first receiving connection pad, and a second receiving connection pad that interconnect with the second electrical circuitry using the metal connectors. The carrier substrate is coupled to the receiving substrate using the connection pads mentioned.

A module includes an electronic component having at least two electrodes, a board having electrodes on its surface to be connected to the electrodes of the electronic component, respectively, solders for connecting the electrodes of the electronic component to the electrodes of the board, respectively, an insulating resin covering the electronic component, the surface of the board, the solder, and the electrodes, and solder resists provided on the surface of the board and around the electrodes of the board, respectively. One of the solder resists is separated from the other electrode at a portion between the electronic component and the board. When this module is mounted on a motherboard, the solder does not flow out of the electrodes even when the solder in the insulating resin melts.

A multi-die integrated circuit (IC) assembly and method for constructing the same are disclosed. Briefly described, the IC assembly can be constructed with a semiconductor die, a layer of die-attach material, and a flip-chip die. The semiconductor die may contain circuit elements disposed across a top surface of the die. The flip-chip die may be oriented such that circuit elements are disposed across a bottom surface of the flip-chip die. The die-attach material may contact and bond the non-circuit element surfaces of the semiconductor die an the flip-chip die (i.e., the bottom surface of the semiconductor die and the top surface of the flip-chip die). This configuration permits the close arrangements of input / output circuit drivers along the entire perimeter of each of the dies. A method for constructing the multi-die IC assembly is also presented. The method can be broadly summarized by the following steps: arranging a semiconductor die such that circuit components are found on the upper surface of the die; arranging a flip-chip such that circuit components are found on the lower surface of the flip-chip; and introducing a layer of die-attach material such that it contacts and bonds the lower surface of the semiconductor die and the upper surface of the flip-chip.

A printed circuit board for coupling surface mounted optoelectric semiconductor devices within a computer system is disclosed. The printed circuit board includes at least one substantially planar surface. There are multiple electrically conductive sites located on the substantially planar surface for connection to a surface mounted semiconductor electronic device. The electrically conductive sites are also connected to electrical interconnects embedded within the printed circuit board. In addition, there are multiple optical pathways terminated at the substantially planar surface for coupling a surface mounted semiconductor optoelectric device.

An interconnection system includes spacers arranged adjacent each other in a row, the spacers having cable sections disposed therein. Each cable section has at least one center conductor and an outer conductive shield. All of the cable sections have one end exposed on a first plane and a second end exposed on a second plane. Electrically conductive contacts are disposed within apertures in a pair of interposers so as to have one end making electrical contact with one of the cable sections and another end extending through its respective aperture in its respective interposer.

A ball grid array package includes a chip having a substrate with a bottom surface, a plurality of solder bumps projecting outwardly from the bottom surface of the substrate, and an electromagnetic shield including a housing that defines an inner space which receives the chip and the solder bumps therein, and a bottom opening for access into the inner space. The solder bumps project outwardly of the inner space through the bottom opening in the housing.