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217 results about "High-speed link" patented technology

In telecommunication, a high-speed link is a way to carry a number of voice channels over an SDH-like link. Transfer protocol layers for SS7 network access:

Network architecture and system for delivering bi-directional xDSL based services

A simple network comprises of: xDSL service equipment located at a distribution center coupled to an Aggregator Separator (AGSEP) System located at a DC; AGSEP system at the DC is coupled, using a high-speed link, to another AGSEP system located at a remote site, which is coupled to subscriber equipment using drop cables. The AGSEP systems aggregate the xDSL signals originating at either DC xDSL equipment or subscriber equipment, are carried over the high-speed link. The AGSEP systems and separate the aggregated signals at either end to distribute the separated signal to the respective equipment.
Owner:RPX CORP

System and method for application sharing in collaborative setting

A distributed collaborative computer system that supports application sharing is provided that comprises a plurality of server computers interconnected via a high-speed link. Client computers can connect to any available server computer and start or join a conference hosted on either the server computer to which the client computer is connected or any other server in the system. As a result, the system and method of the present invention allow application sharing among an arbitrary number of client computers.
Owner:CISCO TECH INC

Distributed network system architecture for collaborative computing

A distributed collaborative computer system is provided that comprises a plurality of server computers interconnected via a high-speed link. Client computers can connect to any available server computer and start or join a conference hosted on either the server computer to which the client computer is connected or any other server in the system. As a result, the system and method of the present invention is easily scalable to support an arbitrary number of participants to a conference by merely adding the appropriate number of server computers to the system. In addition, by replicating the conference information on more than one server computer, the single point of failure limitation is eliminated. In fact, if a server hosting or participating in a conference malfunctions, the failure is detected by other server computers and the client computer is able to reconnect to the conference through a new server computer.
Owner:CISCO TECH INC

Fault tolerant server architecture for collaborative computing

A distributed collaborative computer system is provided that comprises a plurality of server computers interconnected via a high-speed link. Client computers can connect to any available server computer and start or join a conference hosted on either the server computer to which the client computer is connected or any other server in the system. As a result, the system and method of the present invention is easily scalable to support an arbitrary number of participants to a conference by merely adding the appropriate number of server computers to the system. In addition, by replicating the conference information on more than one server computer, the single point of failure limitation is eliminated. In fact, if a server hosting or participating in a conference malfunctions, the failure is detected by other server computers and the client computer is able to reconnect to the conference through a new server computer.
Owner:CISCO TECH INC

Fault-tolerant distributed system for collaborative computing

InactiveUS7069298B2Point be limitedSingle point of failure limitation is eliminatedData processing applicationsMultiprogramming arrangementsHigh-speed linkClient-side
A fault-tolerant distributed collaborative computer system is provided that comprises a plurality of server computers interconnected via a high-speed link. By replicating the conference information on more than one server computer, the single point of failure limitation is eliminated. In fact, if a server hosting or participating in a conference malfunctions, the failure is detected by other server computers and the client computer is able to reconnect to the conference through a new server computer. In addition, the state of processes executed by the server computers is periodically replicated, so that when failure of a process is detected a new processes can be spawned and the replicated state information loaded onto the new process, allowing the on-line conference to continue.
Owner:CISCO TECH INC

System and method for communicating data via a wireless high speed link

A high-speed wireless link communicates data between a central storage system and a mobile remote system. The wireless link further communicates data between two mobile remote systems. Both the central storage system and the mobile remote system include a central processor, a memory, a transceiver, and a means for data output. The high-speed wireless link is established between the transceivers. Data are loaded, processed and stored on the central storage system. The data, including musical data in MP3 format, are automatically downloaded at high transmission speeds from the central storage system to the mobile remote system.
Owner:QUALCOMM INC

Method and system for non disruptively assigning link bandwidth to a user in a high speed digital network

A method based on predefined connection priorities for assigning link bandwidth to a requesting user in a high speed digital network interconnecting network users through a path including network nodes connected through high speed links.According to this method, a predefined reservable link bandwidth is split into so-called nominal bandwidth portions and common bandwidth portions, both assignable to the same connections on a priority basis. Each of the common bandwidth priorities is individually related to a nominal bandwidth priority through a predefined relationship, making the common bandwidth priorities always lower than any nominal priority. In this way the requested link connection bandwidth, whatever be its nominal priority, is made preemptable primarily on all common bandwidth, thus avoiding the disruption of any network connection which is already established.
Owner:IBM CORP

Memory hub system and method having large virtual page size

A memory system and method includes a memory hub controller coupled to a plurality of memory modules through a high-speed link. Each of the memory modules includes a memory hub coupled to a plurality of memory devices. The memory hub controller issues a command to open a page in a memory device in one memory module at the same time that a page is open in a memory device in another memory module. In addition to opening pages of memory devices in two or more memory modules, the pages that are simultaneously open may be in different ranks of memory devices in the same memory module and / or in different banks of memory cells in the same memory device. As a result, the memory system is able to provide an virtual page having a very large effective size.
Owner:MICRON TECH INC

Distributed network system architecture for collaborative computing

A distributed collaborative computer system is provided that comprises a plurality of server computers interconnected via a high-speed link. Client computers can connect to any available server computer and start or join a conference hosted on either the server computer to which the client computer is connected or any other server in the system. As a result, the system and method of the present invention is easily scalable to support an arbitrary number of participants to a conference by merely adding the appropriate number of server computers to the system. In addition, by replicating the conference information on more than one server computer, the single point of failure limitation is eliminated. In fact, if a server hosting or participating in a conference malfunctions, the failure is detected by other server computers and the client computer is able to reconnect to the conference through a new server computer.
Owner:CISCO TECH INC

System and method for encoding packet header to enable higher bandwidth efficiency across PCIe links

ActiveUS20070130397A1Improving bus throughput efficiencyEnergy efficient ICTEnergy efficient computingComputer hardwareGraphics
A computer system that employs Peripheral Component Interconnect Express (PCIe) links includes devices that generate a PCIe packet having a header portion that is smaller than the header portion for a conventional PCI packet. The devices may be an endpoint device, such as a graphics processor, and a chipset, such as a root-complex. The reduced size header improves the bus throughput efficiency of the computer system and reduces power requirements for the computer system.
Owner:NVIDIA CORP

System architecture for a power distribution network and method of operation

Digital and analog functionality are separated and optimized in an Ethernet port architecture to free port circuit space for additional desired functionality. A power controller and physical link controller for the port share a high speed communication link to transfer information and control instructions from one to the other. The physical link controller provides digital functionality and processing capabilities that can generate power control instructions sent to the power controller over the high speed link. The power controller provides analog functionality for controlling the power supplied to the network connection and transfers power related information to the physical link controller over the high speed communication link and receives control instructions through a digital interface. The separation of digital of analog functionality simplifies the power control circuitry, removes redundancy, and frees valuable circuit board space for other desired functionality.
Owner:TEXAS INSTR INC

RAID system for performing efficient mirrored posted-write operations

A bus bridge on a primary RAID controller receives user write data from a host and writes the data to its write cache and also broadcasts the data over a high speed link (e.g., PCI-Express) to a secondary RAID controller's bus bridge, which writes the data to its mirroring write cache. However, before writing the data, the second bus bridge automatically invalidates the cache buffers to which the data is to be written, which alleviates the primary controller's CPU from sending a message to the secondary controller's CPU to instruct it to invalidate the cache buffers. The secondary controller CPU programs its bus bridge at boot time with the base address of its mirrored write cache to enable it to detect that the cache buffer needs invalidating in response to the broadcast write, and with the base address of its directory that includes the cache buffer valid bits.
Owner:DOT HILL SYST

Distributed document sharing

A distributed collaborative computer system that supports document sharing is provided that comprises a plurality of server computers interconnected via a high-speed link. Client computers can connect to any available server computer and start or join a conference hosted on either the server computer to which the client computer is connected or any other server in the system. As a result, the system and method of the present invention allow document sharing among an arbitrary number of client computers.
Owner:CISCO TECH INC

Method and system for hardware based implementation of USB 1.1 over a high speed link

Certain aspects of a method and system for a hardware-based implementation of USB 1.1 over a high-speed link may comprise translating at a client side of a client server communication system, USB protocol messages comprising a first USB standard to corresponding encapsulated USB protocol messages, wherein the USB protocol messages comprising the first USB standard are received from a client device at the client side of the client server communication system. The translated corresponding encapsulated USB protocol messages may be communicated from the client side to a server at a server side of the client server communication system.
Owner:AVAGO TECH INT SALES PTE LTD

Method and apparatus for improved IP networks and high-quality services

The present invention provides a new type of router, called a PACS router, to build an improved IP network in which high-quality services such as voice and best-effort data services can be provided with higher reliability and lower cost. A PACS router includes a packet-switching fabric and a circuit-switching fabric interconnected by channelized high-speed links. A network built with PACS routers uses signaling and routing protocols to segregate traffic into different classes and route them using circuit-channels and packet-channels depending on quality of service requirements. Routing high-quality service over circuit-channels eliminates transit delay typically incurred in packet-switching fabrics, enhances reliability from software malfunction in the router and enhances network scalability by not having to terminate all traffic into packet-switching fabrics in every router. The circuit-switching fabrics in the PACS routers provide further immunity by fast rerouting of failed circuits via alternate routes when a network fault is detected.
Owner:GULA CONSULTING LLC

Method and apparatus for improved IP networks and high-quality services

The present invention provides improved methods and systems to build an integrated IP network in which high-quality services such as voice and best-effort data services can be provided with higher reliability and lower cost. A new type of router, called a PACS router, is disclosed in which the user terminals, computer servers, access routers and other service terminals are connected to the integrated router. A PACS router includes a packet-switching fabric and a circuit-switching fabric interconnected by channelized high-speed links. The PACS router creates and uses two types of channels within channelized high-speed links, which in turn are transported from one router to another via SONET network links. The channels are labeled as either packet-channel or circuit-channel according to the usage of these channels. High-quality services are mapped into a circuit-channel at the service originating router and routed through the circuit-switching fabrics in the routers. The best-effort services, on the other hand, are mapped into a packet-channel, which is terminated in each PACS router where packets from packet-channels are extracted and routed hop-by-hop according to the packet destination header address. A network built with PACS routers uses signaling and routing protocols to segregate traffic into different classes and route them using circuit-channels and packet-channels depending on quality of service requirements. Routing high-quality service over circuit-channels eliminates routing delay typically incurred in packet-switching fabrics, enhances reliability from software malfunction in the router since existing connection at circuit-switching fabric does not depend on software control and enhances network scalability by not having to terminate all traffic into packet-switching fabrics in every PACS router. The circuit-switching fabrics in the PACS routers also provide further immunity by fast rerouting of failed circuits via alternate routes when a network fault is detected.
Owner:GULA CONSULTING LLC

Multi-Stream Digital Display Interface

Multiple video streams can be transmitted over a high speed link. A connection with a receiver can be detected by a transmitter. The transmitter can then establish a link with the receiver. Multiple streams of video data can be packed into a transfer unit. The transmitter can then transmit the transfer unit with the multiple stream video data over one or more lanes of the link to the receiver. A high speed communications link between a receiver and a transmitter can transmit data for multiple video streams over a single lane within a data link. The high speed communication link is scalable in bandwidth and video / audio streams transmitted, and backward compatible with other types of video data communication connections. The high speed link may support up to eight video / audio streams simultaneously, thereby enabling full use of data link bandwidth.
Owner:ANALOGIX SEMICON

Method and system for transmitting data between a receiver and a transmitter

A method and system for transmitting data between at least one receiver operatively connected to at least one transmitter, and more particularly to a method and a system for permissible transmission via at least one high-speed link having a plurality of virtual channels. The method includes the receiver sending a virtual channel credit packet for a particular virtual channel to the transmitter, the credit packet being indicative that the receiver is available to receive data and having a unique virtual channel number assigned to said particular virtual channel thereto. The transmitter responds to the virtual channel credit packet, which includes transmitting data to the receiver if data is available. The receiver receives the data transmitted from the transmitter.
Owner:HEWLETT PACKARD DEV CO LP

RAID system for performing efficient mirrored posted-write operations

A bus bridge on a primary RAID controller receives user write data from a host and writes the data to its write cache and also broadcasts the data over a high speed link (e.g., PCI-Express) to a secondary RAID controller's bus bridge, which writes the data to its mirroring write cache. However, before writing the data, the second bus bridge automatically invalidates the cache buffers to which the data is to be written, which alleviates the primary controller's CPU from sending a message to the secondary controller's CPU to instruct it to invalidate the cache buffers. The secondary controller CPU programs its bus bridge at boot time with the base address of its mirrored write cache to enable it to detect that the cache buffer needs invalidating in response to the broadcast write, and with the base address of its directory that includes the cache buffer valid bits.
Owner:DOT HILL SYST

Apparatus and method for a fault-tolerant scalable switch fabric with quality-of-service (QOS) support

Embodiments of the present invention relate to portions of a switch fabric having a single logical stage and at least one physical stage. In addition, the data paths and the control paths of the switch fabric can be decoupled thereby allowing additional processing to be performed than would otherwise be the case with control rates that matched the high data rates. In other words, data cells received on high speed links can be spread over many lower speed links; consequently, the data cells can transit the switch fabric at that high speed while the control information associated with the data can be processed at that lower speed. Because the control information can be processed at a lower speed (associated with the control path), the control information can be processed over a greater period of time.
Owner:TELLABS OPERATIONS

Segment protection scheme for a network

This invention broadly comprises a novel segment protection scheme (survivability framework) for a network, which we refer to as PROMISE (Protection using MultIple SEgments). It combines the best of existing link and path protection schemes (e.g., bandwidth efficiency and fast recovery). The PROMISE approach divides an active path or AP (along which a survivable connection is established) into several, possibly overlapping active segments or ASs, and then protects each AS with a detour called backup segment or BS (instead of protecting the AP as a whole as in path protection schemes). This facilitates the bandwidth sharing not only among the BSs for different APs, but also among those for the same AP. In addition, recovery time can be shortened due to the limited length of each AS and BS. This technology can be applied to MPLS, ATM, SONET, WDM and other high-speed link layers under the evolving G-MPLS framework.
Owner:THE RES FOUND OF STATE UNIV OF NEW YORK

Link system for establishing high speed network communications and file transfer between hosts using I/O device links

A High Speed Link System providing network and data transfer capabilities, implemented via standard input / output (I / O) device controllers, protocols, cables and components, to connect one or more Host computing systems, comprising a System, Apparatus and Method is claimed; and described in one or more embodiments. An illustrative embodiment of the invention connects two or more Host systems via USB 3.0 ports and cables, establishing Network, Control, Data Exchange, and Power management required to route and transfer data at high speeds, as well as resource sharing. A Link System established using USB 3.0 operates at the full 4.8 Gbps, eliminating losses inherent when translating to, or encapsulating within, a network protocol, such as the Internet Protocol. Method claimed herein describes how two or more connected Host systems, detect one another, and establish separate communication and data exchange bridges, wherein control sequences from the Hosts' application direct the operation of the Apparatus.
Owner:CROSSPORT NETWORK SOLUTIONS INC

High speed linking module

A device for converting at least four parallel data streams on respective input data lines into one serial data stream on a fiber optic data line. The device includes a first multiplexer for multiplexing at least two of the parallel data streams into a first intermediate output stream and a second multiplexer for multiplexing at least two other of the parallel data streams into a second intermediate output stream. A serializing transmitter is coupled to the first and second multiplexers for serializing the first and second intermediate output streams into the serial data stream. A signal synchronizes the serializing of the first and second intermediate output streams and tags output data in the serial data stream as corresponding to data from each of the respective input data lines. In-band messaging is used to transfer commands and status messages between devices without affecting ongoing data stream communications.
Owner:MCDATA SERVICES CORP +1

Increasing communication safety by preventing false packet acceptance in high-speed links

Methods, apparatus, and systems for preventing false packet acceptance in high-speed links. Under one aspect, correctable symbol errors are detected, and determination is made to whether a symbol error rate or ratio (SER) exceeds an SER threshold. In response to detection of such a condition, the link is disconnected or temporarily paused. The value for the SER threshold is determined using a statistical analysis of various link parameters to meet desired performance levels, such as a mean time to false packet acceptance (MTTFPA) of >approximately 15 billion years while providing a mean time to disconnect of >100 years.
Owner:INTEL CORP

Method and apparatus for providing optimized high speed link utilization

A method and apparatus for providing link aggregation and 10.2 gigabit per second throughput in a Fibre Channel fabric. One aspect of the present invention provides a port module for receiving a 10.2 gigabit link on a fiber interface and providing trunking of a plurality links on the backplane, wherein the backplane is coupled to a switching element. In addition, another aspect of the present invention provides a first port module coupled to a switching element for receiving a 10.2 gigabit link from a fabric on a fiber interface and thereafter transmitting fiber channel frames to a second port module coupled to the switching element that interfaces to the fabric at 10.2 gigabits, thereby providing 10.2 gigabit to 10.2 gigabit throughput from the first port module to the second port module.
Owner:AVAGO TECH INT SALES PTE LTD

Method and apparatus for modulating the width of a high-speed link

The described embodiments include a system that modulates the width of a high-speed link. The system includes a transmitter circuit coupled to a high-speed link that includes N serial lanes. During operation, while using a first number of lanes to transmit frames on the high-speed link, the transmitter circuit determines a second number of lanes to be used to transmit frames on the high-speed link based on a bandwidth demand on the high-speed link. The transmitter circuit then sends an indicator of the second number of lanes to a receiver on the high-speed link. Upon receiving an error-free acknowledgment of the indicator from the receiver, starting from a predetermined frame, the transmitter circuit transmits subsequent frames on the high-speed link using the second number of lanes.
Owner:ORACLE INT CORP

Time-based grooming and degrooming methods with common time reference for optical networks

Time-based grooming and degrooming methods and systems of data units that utilize a common time reference is disclosed. Time is divided into a plurality of contiguous periodic time frames with a plurality of time frame durations. The system and method enable the grooming and switching of data units from a plurality of low speed links into one or more high-speed links. The system and method further enable the grooming and switching of data units from one or more high-speed links into a plurality of low speed links. The plurality of data units that are contained in each of the time frames are forwarded in a pipelined manner through the network switches. The system operates with high-speed wavelength division multiplexing (WDM) links, i.e., with multiple lambdas. The outcome of this method is called fractional lambda grooming.
Owner:SYNCHRODYNE
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