Array substrate includes a gate line which extends along a first direction, a gate insulating layer which covers the gate line, a data line located on the gate insulating layer and intersects the gate line, a thin-film
transistor (“TFT”) which has a control
electrode connected to the gate line and an
electrode connected to the data line, a pixel
electrode connected to the other electrode of the TFT, where the pixel electrode includes
branch electrodes, openings are defined between the
branch electrodes, each of the openings includes a first bent portion which corresponds to a middle part of the pixel area and a second bent portion and a third bent portion located symmetrically to each other with respect to the first bent portion, and the data line includes a cover region which protrudes toward the pixel area and covers at least part of the pixel area.