31results about How to "Avoid volume increase" patented technology

An integrated circuit and a method for using metal fill geometries to reduce the voltage drop in power meshes. Metal fill geometries are connected to the power mesh using vias or wires at multiple locations. Metal fill geometries are connected to other floating metal fill geometries using vias or wires at multiple locations. The circuit design introduces maximum redundancy between metal fill geometries and power mesh geometries, but partial redundancy between metal fill geometries and metal fill geometries. In particular, the redundancy in connectivity between metal fill geometries and metal fill geometries is kept minimal to reduce the number of geometries introduced. The high redundancy between metal fill geometries and power mesh geometries and the partial redundancy among metal fill geometries result in a smaller IR-drop by reducing the effective resistance on a power mesh. Hence, the invention use redundancy carefully and advantageously to achieve simultaneous metal density and IR-drop optimization without introducing excessive number of metal fill geometries.

A main wall part is provided so as to surround an integrated circuit part. A sub-wall part which is in “L” shape is provided between each corner of the main wall part and the integrated circuit part. Therefore, even if the stress is concentrated due to heat treatment or the like, the stress is dispersed to the main wall part and the sub-wall part, and hence peeling between layers and a crack are unlikely to occur, as compared with the conventional art. Further, even if the crack and the like occur at the corner, moisture from the outside hardly reaches the integrated circuit part when the main wall part and the sub-wall part are coupled to each other. For this reason, it is possible to ensure an extremely high moisture resistance.

A locating system for determining a position of an object comprises a transmitting station that transmits a first ID signal containing a first identifier of this transmitting station; a receiving station that receives the first ID signal, measures the intensity of the first ID signal, and extracts the first identifier; a data management unit that stores and manages the intensity in association with the first identifier, the intensity and the identifier being supplied from the receiving station; and a positioning computer that estimates the position of the transmitting station using a first correcting formula defining a relation between the intensity and the distance, based on the data stored in the data management unit.

A fluid pump includes a case including a pump chamber, a reserve tank for storing spare liquid and located in the case but outside the pump chamber and formed so that a space independent of the pump chamber is defined by the reserve tank, a fluid path forming member arranged inside the reserve tank and including a discharge path communicating between a discharge port and the pump chamber, and a communication hole which is formed in a side of the fluid path forming member so as to assume such a position that the communication hole faces an inside of the reserve tank so that the hole communicates between the discharge path and the inside of the reserve tank, the communication hole being sized so that air in the pump chamber is allowed to flow through the hole into the reserve tank.

A voice recognition system includes: a voice input unit 11 for inputting a voice uttered a plurality of times; a registering voice data storage unit 12 for storing voice data uttered the plurality of times and input into the voice input unit 11; an utterance stability verification unit 13 for determining a similarity between the voice data uttered the plurality of times that are read from the registering voice data storage unit 12, and determining that registration of the voice data is acceptable when the similarity is greater than a threshold Tl; and a standard pattern creation unit 14 for creating a standard pattern by using the voice data where the utterance stability verification unit 13 determines that registration is acceptable.

A voice recognition system includes: a voice input unit 11 for inputting a voice uttered a plurality of times; a registering voice data storage unit 12 for storing voice data uttered the plurality of times and input into the voice input unit 11; an utterance stability verification unit 13 for determining a similarity between the voice data uttered the plurality of times that are read from the registering voice data storage unit 12, and determining that registration of the voice data is acceptable when the similarity is greater than a threshold Tl; and a standard pattern creation unit 14 for creating a standard pattern by using the voice data where the utterance stability verification unit 13 determines that registration is acceptable.

A method of designing a semiconductor integrated circuit based on the TPI technique, comprising: (A) selecting a target node from a plurality of nodes included in a design circuit; (B) inserting a test point at the target node; (C) designating a delay time with respect to a test point path that is a path connected to the test point; and (D) laying out the design circuit such that a delay time of the test point path becomes the designated delay time. The (A) selecting includes: (A1) calculating delay times of fan-in paths and fan-out paths with respect to each of the plurality of nodes; and (A2) selecting the target node from the plurality of nodes based on the calculated delay times.

A hybrid vehicle equipped with an internal combustion engine and a motor-generator for running the vehicle, includes: a power storage device to be supplied to the motor-generator; a current leakage detection circuit detecting a decrease in insulation resistance, the current leakage detection circuit being electrically connected to a negative electrode of the power storage device; an electrical heated catalyst device; and a power supply device that converts electric power from the power storage device into energization power of the electrical heated catalyst device by a power conversion path passing through an insulating mechanism. The power supply device includes a switching device. The switching device is opened when the electrical heated catalyst device is energized, and is closed when the decrease in insulation resistance of the electrical heated catalyst device is detected.

In a working machine, a towing handle is mounted on a top section of a machine body in such a manner that the handle is pivotable between a stored position and a deployed position, and the machine body is towable with the handle in the deployed position. The handle in the stored position extends along outer peripheral portions of the top section and a predetermined wall section of the machine, and the wall section has an upper end region that extends in a machine-towing direction to connect to the top section and has to-be-protected member provided thereon. The handle in the stored position projects outwardly beyond the top section and the wall section.

In a working machine, a towing handle is mounted on a top section of a machine body in such a manner that the handle is pivotable between a stored position and a deployed position, and the machine body is towable with the handle in the deployed position. The handle in the stored position extends along outer peripheral portions of the top section and a predetermined wall section of the machine, and the wall section has an upper end region that extends in a machine-towing direction to connect to the top section and has to-be-protected member provided thereon. The handle in the stored position projects outwardly beyond the top section and the wall section.

The present invention is directed to facilitate debugging in a semiconductor integrated circuit device including a plurality of microprocessors. A semiconductor integrated circuit device includes: a plurality of processors; a plurality of debug interfaces enabling debugging of the corresponding processors; a plurality of common terminals shared by the plurality of debug interfaces; a selection circuit capable of selectively connecting the plurality of debug interfaces to the common terminals; and a controller capable of controlling selecting operation in the selection circuit in accordance with a predetermined instruction. A first selector capable of selectively connecting the plurality of debug interfaces to a TRST terminal in the terminal group conformed with the JTAG specifications, and a second selector capable of selectively connecting the plurality of debug interfaces to terminals other than the TRST terminal are provided. With the configuration, even in the case where the number of processors increases, the invention can flexibly address the increase.

A bezel member ( 52 ) to which a lens ( 54 ) which transmits light from a light source ( 37 ) is supported on a main body ( 30 ) to be fixed to a vehicle body ( 11 ). A spherical surface ( 52 a) is formed on one of the main body ( 30 ) or a bezel member ( 52 ), and sliding members ( 34 ) for being pressed against the spherical surface ( 52 a) are formed on the other one of them, so that the bezel member ( 52 ) can be rotated with respect to a supporting member ( 33 ) of the main body ( 30 ) and fixed to a given position. Since a metal plate is used as the sliding members ( 34 ) in this interior illumination lamp ( 10 ), a problem such that the light source cannot be fixed to the desired direction due to abrasion or change of properties of the felt sliding member as in the related art due to the temperature or deterioration with age can be solved. Also, in comparison with the case in which the spring or the like is employed, increase in cost due to increase in the number of parts can be avoided.

A relay apparatus 30 issues a new sub-address at a timing when mobile phones (10a, 10b) requested content from a CP server apparatuses (20a, 20b), that is, at a timing when a sub-address is required. The content specified by this sub-address is distributed from the CP server apparatuses via the relay apparatus (30) to the mobile phones. In system of the present invention it is possible to utilize the same sub-address many times for different content items. It is therefore possible to avoid increasing the number of digits of the sub-address as well as the complexity of the sub-address structure, in a case where the types of content or the number of content items increases.

A multilayer ceramic electronic component includes a multilayer body including ceramic layers and inner electrode layers, the inner electrode layers being disposed on interfaces between the ceramic layers, and an outer electrode on an external surface of the multilayer body and electrically connected to first end portions of the inner electrode layers exposed to the external surface of the multilayer body. Each of the ceramic layers includes a thin portion with a continuously reducing thickness near the first end portion. Each inner electrode layer includes a thick portion near a connection with the outer electrode, the thick portion having a thickness continuously increasing toward the connection on a first side in accordance with a shape of the thin portion in the ceramic layer. A distance between a second end portion in the inner electrode layer not joined to the outer electrode, and the thick portion adjacent to the second end portion is equal to or longer than an interlayer distance between the inner electrode layers.

When the degree of matching between patterns decreases due to a pattern fluctuation or an appearance fluctuation that has occurred during manufacturing steps, a heavy work burden would be placed on an operator. A data processing unit of a pattern matching apparatus calculates a threshold for determination of matching between a first template image and a partial region of a search target image obtained by capturing an image of the surface of a sample, on the basis of a result of evaluation of a similarity between the search target image and a second template image, the second template image having been captured in a wider range than the first template image.

The invention provides two types of silicon-on-insulator (SOI) structures with step-type buried oxide layers. The first type of SOI structure comprises a P-type semiconductor substrate, a gate insulation layer formed above a P-type channel, a grid electrode formed above the gate insulation layer and a side wall which covers the grid electrode and the side edge of the gate insulation layer, wherein an N-type source region, an N-type drain region, the step-type buried oxide layers positioned in the N-type source region and the N-type drain region and below the P-type channel are formed on the semiconductor substrate; the thicknesses of the buried oxide layers positioned in the N-type source region and the N-type drain region are respectively greater than that of the buried oxide layer positioned below the P-type channel; and a P-type element heavily doped region is arranged in the P-type semiconductor substrate below the corresponding thinner buried oxide layer below the side wall adjacent to one side of the N-type drain region. Different from the first type of SOI structure, the second type of SOI structure is characterized in that the top of the substrate is provided with the N-type doped region, and the source region and the drain region are P-type. By utilizing the technical scheme of the invention, the short channel effect of the existing SOI structures can be solved.

The invention provides two methods for forming a silicon-on-insulator (SOI) structure provided with a stepped oxidization buried layer. The first method comprises the following steps of: providing a first region and a third region used for forming a source region and a drain region respectively, and a P-type semiconductor substrate of a second region on which a grid electrode, a grid electrode insulating layer and a hard mask layer are formed, wherein a BOX layer is arranged in the substrate, and a P-type element heavily-doped region corresponding the drain region is formed below the BOX layer; forming a side wall for covering the hard mask layer, the grid electrode and the grid electrode insulating layer; forming an N-type source region and an N-type drain region; performing oxygen ion implantation on the substrate positioned below the BOX layer corresponding to the source region and the drain region except the side wall; and performing high-temperature annealing to form an oxygen ion implantation region and the BOX layer into a stepped oxidization layer. The other method comprises the following steps of: forming an N-type doped region on the top layer of the substrate; and forming the source region and the drain layer in the doped region. Due to the adoption of the technical scheme provided by the invention, the short-channel effect of an existing SIO structure can be avoided.