922results about How to "Average power consumption" patented technology

Disclosed is a semiconductor device functioning as a multivalued memory device including: memory cells connected in series; a driver circuit selecting a memory cell and driving a second signal line and a word line; a driver circuit selecting any of writing potentials and outputting it to a first signal line; a reading circuit comparing a potential of a bit line and a reference potential; and a potential generating circuit generating the writing potential and the reference potential. One of the memory cells includes: a first transistor connected to the bit line and a source line; a second transistor connected to the first and second signal line; and a third transistor connected to the word line, bit line, and source line. The second transistor includes an oxide semiconductor layer. A gate electrode of the first transistor is connected to one of source and drain electrodes of the second transistor.

Information processing equipment is so constructed that the power consumption of a disk drive for hard disks, optical disks, or the like can be reliably and sufficiently reduced. The host CPU (120) of an information processing unit (100) forms a command for changing the power consumption mode of a HDD (200) based on the state of control on the HDD (200). The host CPU supplies the command to the HDD (200) through a media controller (106). When the HDD (200) accepts the command, it changes its power consumption mode according to the instruction from the information processing unit. Thus, the information processing unit can control the power consumption mode of the HDD (200) based on the state of control on the HDD (200).

The present invention provides an integrated circuit comprising a system bus to which a processor is connectable, and first and second peripheral buses to which peripheral units used by said processor are connected, the first peripheral bus operating at a higher clock speed than the second peripheral bus. Further, the integrated circuit comprises bridge logic for providing an interface between the system bus and the peripheral buses to enable signals to be passed between the system bus and the peripheral buses, the bridge logic comprising clock resynchronisation logic for synchronising the system bus and the peripheral buses. Through the provision of first and second peripheral buses operating at different clock speeds, the integrated circuit of the present invention provides a great deal of flexibility for reducing the power consumption of the integrated circuit as compared with a similar integrated circuit having only one peripheral bus. Since the power consumption of each peripheral bus is proportional to the clock frequency and capacitance, significant power consumption savings can be realised by ensuring that each peripheral unit is connected to the slowest peripheral bus appropriate for that peripheral unit.

A non-volatile memory device capable of reading and writing a large number of memory cells with multiple read / write circuits in parallel has features to reduce power consumption during read, and program / verify operations. A read or program verify operation includes one or more sensing cycles relative to one or more demarcation threshold voltages to determine a memory state. In one aspect, selective memory cells among the group being sensed in parallel have their conduction currents turned off when they are determined to be in a state not relevant to the current sensing cycle. In another aspect, a power-consuming period is minimized by preemptively starting any operations that would prolong the period. In a program / verify operation cells not to be programmed have their bit lines charged up in the program phase. Power is saved when a set of these bit lines avoids re-charging at every passing of a program phase.

The present invention provides a load used for communication in a remote device having a dynamic communication load configuration. In one embodiment, the dynamic communication load configuration vanes as a function of a characteristic of power in the remote device. The remote device toggles between load configurations to communicate with the inductive power supply. A sensor in the remote device detects a characteristic of power in the remote device and configures the communication load based on the sensor output. In another embodiment, the remote device adjusts the dynamic communication load configuration in the remote device in response to a failure to receive a response from the inductive power supply.

A SRAM memory is composed of FD-SOI transistors, and performance of the memory cell is improved by controlling an electric potential of a layer under a buried oxide film of a SOI transistor constituting a driver transistor. Performance of the SRAM circuit in the low power voltage state is improved. In the SRAM memory cell composed of the FD-SOI transistor, an electric potential of a well under a BOX layer is controlled to control a threshold voltage Vth, thereby increasing a current. Thus, the operations of the memory cell can be stabilized.

It is an object of the present invention to provide a display device in which problems such as an increase of power consumption and increase of a load of when light is emitted are reduced by using a method for realizing pseudo impulsive driving by inserting an dark image, and a driving method thereof. A display device which displays a gray scale by dividing one frame period into a plurality of subframe periods, where one frame period is divided into at least a first subframe period and a second subframe period; and when luminance in the first subframe period to display the maximum gray scale is Lmax1 and luminance in the second subframe period to display the maximum gray scale is Lmax2, (½) Lmax2<Lmax1<( 9 / 10) Lmax2 is satisfied in the one frame period, is provided.

Integrated telephone with an xDSL-modem (2), comprising a splitter unit (6) for separating telephone signals received via a telephone line (9) in a low-frequency band from data signals received in a high-frequency band via the telephone line (9), a telephone set (3) connected to the splitter unit (6) for the transmission of telephone signals in the low-frequency band; and a high-speed xDSL-modem (2) connected to the splitter unit (6) for the transmission of data signals in the high-frequency band.

A method is disclosed of estimating significant places visited by a mobile-terminal user for wireless communication via base stations. The method includes: collecting at least one communication log represented with consecutive communication events between the mobile terminal and connected one of the base stations in a coverage area of each mobile terminal, the base stations being identified by unique base-station identifiers (BS IDs), respectively, each communication event including date and time of communication and one of the BS IDs which is indicative of the connected base station; dividing each communication log into consecutive time-windowed segments, using a discrete time window moving in time; and, per each time-windowed segment, estimating at least one significant place visited by the user, based on a probability distribution with which the BS IDs appear in each time-windowed segment.

Level control signals are both set to H level, and potentials of power supply lines are both set to be lower than a power supply potential. In this manner, a gate leakage current during waiting and writing operation of a memory cell array can significantly be reduced. The level control signals are set to L level and H level respectively, and solely the potential of one of the power supply lines is set to be lower than the power supply potential. In this manner, power consumption during a reading operation of the memory cell array can be reduced.