The nonlinearity effect of a rectifying element is enhanced, and further a resonant circuit is used to enlarge the input amplitude. Furthermore, the rectifying efficiency of a detection
rectifier circuit is enhanced, thereby allowing the
gain of an
amplifier circuit in the following stage to be set to a low value. Signals having mutually opposite phases are inputted to RF input terminals (101,102). The
signal at the terminal (102) is then inputted to the gate of a
transistor (M1) via a
capacitor (C3), while the
signal at the terminal (101) is then inputted, via a
capacitor (C1), to a node (N1) to which the source of the
transistor (M1) and the gate and drain of a
transistor (M2) are connected, whereby a
capacitor (C2) is charged with a half-wave
voltage-doubled rectified current. DC biases are inputted to terminals (301,302). There are formed series resonant circuits (L1,C15;L2,C16). A plurality of half-wave
voltage-doubled
rectifier circuits (M1,M2,C1-C3,R1) are connected in
cascade.