83 results about "Digital filter design" patented technology

An integrated circuit, e.g. an AC '97 conforming audio codec, includes a digital filter and gain module including multiple channels of gain control and multiple channels of digital filtering. A gain control module includes an overflow check of data samples requiring differing lengths of clamping. Each channel of the digital filter includes a finite impulse response (FIR) filter, and an infinite impulse response (IIR) filter. The digital filtering is implemented largely in hardware independent of the number of channels required and/or independent of the required order of the filtering. Thus, filter channels can be added or additional filtering implemented merely by increasing the clock speed without changing the digital filter design. The FIR filter is capable of being reset each frame to prevent a DC buildup at internal nodes. The IIR filter performs a plurality of 2nd order biquadratic equations in an overall average of as few as four clock cycles per 2nd order biquad. A RAM is used to store the state variables for the 2nd order biquadratic equations. The state variable RAM is reset by controlling the clear input of latches at an input and/or the output of the state variable RAM, and the state variable RAM is addressed by a delta counter which is independent of the particular number of filter channels or filter orders implemented. Test patterns may be inserted between functional modules of an integrated circuit such as the disclosed audio codec by appropriate control of the preset and clear inputs to output latches of the functional modules.

An integrated circuit, e.g. an Audio Codec (AC) '97 conforming audio codec, includes a digital filter and gain module including multiple channels of gain control and multiple channels of digital filtering. A gain control module includes an overflow check of data samples requiring differing lengths of clamping. Each channel of the digital filter includes a finite impulse response (FIR) filter, and an infinite impulse response (IIR) filter. The digital filtering is implemented largely in hardware independent of the number of channels required and/or independent of the required order of the filtering. Thus, filter channels can be added or additional filtering implemented merely by increasing the clock speed without changing the digital filter design. The FIR filter is capable of being reset each frame to prevent a direct current (DC) buildup at internal nodes. The IIR filter performs a plurality of 2nd order biquadratic equations in an overall average of as few as four clock cycles per 2nd order biquad. A random access memory (RAM) is used to store the state variables for the 2nd order biquadratic equations. The state variable RAM is reset by controlling the clear input of latches at an input and/or the output of the state variable RAM, and the state variable RAM is addressed by a delta counter which is independent of the particular number of filter channels or filter orders implemented. Test patterns may be inserted between functional blocks of an integrated circuit such as the disclosed audio codec by appropriate control of the preset and clear inputs to output latches of the functional blocks.

A digital filter is designed by combining unit filters (L10′, H10′) having a predetermined asymmetric numerical sequence as filter coefficients (H1 to H3). Thus, it is possible to automatically obtain a desired digital filter coefficient only by combining the unit filter. Moreover, a symmetric numerical sequence {−1, 0, 9, 16, 9, 0, −1}/32 is divided at the center into two parts and one of them is used as the asymmetric filter coefficients (H1 to H3). This reduces the number of taps required for the digital filter designed, eliminates use of a window function, and prevents generation of a discretization error in the filter characteristic obtained.

The invention relates to a method for designing a high-order finite impulse response digital filter, which comprises the following steps that: a neural network method is utilized and the amplitude-frequency response error sum of squares of a filter to be designed and an ideal filter serves as the calculation energy function of a neural network; the gradient descent learning algorithm is adopted to train the weight of the neural network to minimize the amplitude-frequency response error sum of squares of the filter to be designed and the ideal filter; when the neural network is stabilized, each parameter of the finite impulse response digital filter can be obtained and then the design of the finite impulse response digital filter is completed. The high-order finite impulse response digital filter designed by the method of the invention is characterized by small pass band fluctuation, large stop-band attenuation, controllable boundary frequency and high precision, etc., especially by that no matrix inversion algorithm is required to be carried out in the design, thus having fast operation speed, and the filter has broad application prospect in the engineering fields such as data transmission, high-precision televisions, radar and sonar systems and voice and image processing, etc.

The invention relates to a method for designing a digital filter applied in an inertia device. The method is characterized by comprising the following steps of: determining an amplitude attenuation allowable value according to the precision of the inertia device, determining a phase delay allowable value according to the performance index of a strap-down inertial navigation system, and determining certain technical parameters of the filter according to the actual signal power spectrum analysis of the inertia device; designing a reference analog filter, converting the reference analog filter into an infinite impulse response (IIR) digital filter by using a bilinear transform method, observing a bode diagram in the filter parameter adjusting process, and performing off-line simulation calculation according to the actually measured data; and performing judgment by using de-noising effect, common cutoff frequency, amplitude attenuation and phase delay as fuzzy variables and using fuzzy rules to optimize the integral performance index. The digital filter designed by using the method can effectively filter the noise in the inertia device, meanwhile, controls the amplitude attenuation and the phase delay in an allowable range, and ensures the precision of the signals.

A digital filter design algorithm is implemented directly within a process control field device or other process related equipment. Filter design parameters are exposed so that filter design parameter values may be provided to the digital filter design algorithm so that the digital filter design algorithm may calculate digital filter coefficients for a digital filter having desired frequency response characteristics. The digital filter design parameter values may be provided by a user, or may be provided as process variable data output from a process control field device or other process related equipment. Once the coefficients of the digital filter having the desired frequency response characteristics have been calculated, the digital filter may be applied to process variable data received by the process control field device or other process related equipment.

An integrated circuit, e.g. an AC '97 conforming audio codec, includes a digital filter and gain module including multiple channels of gain control and multiple channels of digital filtering. A gain control module includes an overflow check of data samples requiring differing lengths of clamping. Each channel of the digital filter includes a finite impulse response (FIR) filter, and an infinite impulse response (IIR) filter. The digital filtering is implemented largely in hardware independent of the number of channels required and/or independent of the required order of the filtering. Thus, filter channels can be added or additional filtering implemented merely by increasing the clock speed without changing the digital filter design. The FIR filter is capable of being reset each frame to prevent a DC buildup at internal nodes. The IIR filter performs a plurality of 2nd order biquadratic equations in an overall average of as few as four clock cycles per 2nd order biquad. A RAM is used to store the state variables for the 2nd order biquadratic equations. The state variable RAM is reset by controlling the clear input of latches at an input and/or the output of the state variable RAM, and the state variable RAM is addressed by a delta counter which is independent of the particular number of filter channels or filter orders implemented. Test patterns may be inserted between functional blocks of an integrated circuit such as the disclosed audio codec by appropriate control of the preset and clear inputs to output latches of the functional blocks.

The invention discloses a nonnegative adaptive filter, and belongs to the field of digital filter design. The filter is obtained by a cost function composed of a 10-norm and a logarithm absolute error function which minimize a coefficient vector. Minimization of the 10-norm speeds up convergence of a nonnegative adaptive filter estimation unknown system, while minimization of the logarithm absolute error function improves the robustness of the nonnegative adaptive filter. The nonnegative adaptive filter can be applied to an occasion in which an electronic or communication system is interfered by high pulse noise.

An original filter is connected to an adjustment filter in the longitudinal way. The original filter has a first filter coefficient of a symmetric numeric string. The adjustment filter has a second filter coefficient which realizing an invert frequency amplitude characteristic B contacting with a frequency amplitude characteristic A of the original filter at the amplitude maximum value “1”. By executing a product-sum calculation of the first filter coefficient and the second filter coefficient, it is possible to design a desired filter coefficient.

The invention discloses a method for designing a digital filter. The method specifically comprises the steps that the index of the digital filter to be designed is converted into the index of a corresponding analog filter; the analog filter is integrated directly in a corresponding frequency domain according to the index of the corresponding analog filter, so that a system function of the analog filter is obtained; the obtained system function of the analog filter is converted into the system function of the digital filter to be designed. By the aid of the method for designing the digital filter, asymmetrical frequency response of single-frequency bands or multi-frequency bands can be achieved, the order of the filter cannot be changed, the frequency response of the filter can be adjusted flexibly by changing the position of a transmission zero, and thus the filter can meet actual requirements. The bend width of each frequency band can be accurately controlled, and fluctuation in each band is constant.

A method and apparatus for designing low-order linear-phase IIR filters is disclosed. Given an FIR filter, the method utilizes a new Krylov subspace projection method, called the rational Arnoldi method with adaptive orders, to synthesize an approximated IIR filter with small orders. The method is efficient in terms of computational complexity. The synthesized IIR filter can truly reflect essential dynamical features of the original FIR filter and indeed satisfies the design specifications. In particular, the linear-phase property is stilled remained in the passband.

The invention discloses an adaptive filter with variable parameters and zero attractors, and belongs to the field of digital filter design. The filter mainly uses time-varying step parameters and regularization parameters that control the intensity of the zero attractors to speed up the convergence speed of the adaptive filter and reduce its steady-state offset. The adaptive filter with variable parameters and zero attractors disclosed by the invention has a great improvement in performance compared with the conventional filter when the input is white signal input. The adaptive filter with variable parameters and zero attractors disclosed by the invention can be applied to applications such as echo cancellation and active noise control.

A numerical string consisting of a ratio of “−1, m, −1” or “1, m, 1” is subjected to a predetermined moving average calculation n times. A numerical string thus obtained is used as filter coefficients of a basic filter and at least one basic filter is combined in an arbitrary way for cascade connection, thereby calculating the filter coefficients of the digital filter to be obtained. This significantly reduces the number of taps and the number of multipliers used as compared to the conventional FIR filter. Moreover, by using the numerical strings “−1, m, −1” and “1, m, 1” so that the filter impulse response becomes a finite-base function, it is possible to obtain a preferable frequency characteristic having no discretization error and having a great attenuation amount out of band.

The invention discloses a robust spline adaptive filter, and belongs to the field of digital filter design. According to the spline adaptive filter, an optimal nonlinear unknown system is approximatedby adopting a spline function, and the resistance to pulse interference is enhanced by adopting a method of performing symbolic operation on error signals. The spline adaptive filter can be used foroccasions where electronic, speech and communication systems are subjected to nonlinear distortion and pulse noise interference.

An original filter is connected to an adjustment filter in the longitudinal way. The original filter has a first filter coefficient of a symmetric numeric string. The adjustment filter has a contact point at a position where the maximum value is acquired in the original filter frequency amplitude characteristic A and has a symmetric second filter coefficient realizing the frequency amplitude characteristic B having the minimum value at the contact point. By executing a convolution calculation of the first filter coefficient and the second filter coefficient, it is possible to design a desired filter coefficient.

The present invention is a filter design that extracts information from a signal by employing D scale nonuniform sampling. In one embodiment a D scale multiresolution sampler, filter bank router, filter bank sampler controller, phase shifter, and consolidator constitute a maximal arrangement for a D scale FIR/IIR filter design.

A symmetric unit filter (L10') is designed by combining in series two unit filters (1L10, 2L10) having asymmetric numerical sequences as filter coefficients (H1 to H3 and H4 to H6). Thus, by designing a filter by series connection, it is possible to automatically obtain a desired digital filter coefficient only by combining one type of unit filter (L10') in series. Moreover, a symmetric numerical sequence {-1, 0, 9, 16, 9, 0, -1}/32 is divided at the center into two parts and one of them is used as the asymmetric filter coefficients (H1 to H3 and H4 to H6). This reduces the number of necessary taps, eliminates use of a window function, and prevents generation of a discretization error in the filter characteristic obtained.

The invention relates to a one-dimensional film-cavity type unequal bandwidth optical interleaver design method at any duty ratio. The structure is formed by cascading the dielectric cavities with the multilayer films vapor-deposited on the left and right sides. The multilayer film structure between the dielectric cavities is equivalent to be a reflector to obtain a simplified structure of a multi-cavity reflector cascading structure. z transformation of a digital signal processing theory is introduced to obtain a reflection transmission function expression of the simplified structure, and on this basis, through the combination with the Butterworth digital filter design method, the optimal reflection coefficient of each reflector can be obtained by means of a genetic algorithm. At the end, the multilayer film structure between the dielectric cavities is constructed based on the optimal reflection coefficient to realize the design of the one-dimensional film-cavity type unequal bandwidth optical interleaver. The method is simple by means of the mature digital filter design method, and the designed one-dimensional film-cavity type unequal bandwidth optical interleaver is simple in structure and easy to manufacture in actual condition; and moreover, the optical interleaver at any duty ratio can be designed, and the output spectrum with high flatness characteristic can be obtained.