64results about How to "Reliable leveling" patented technology

T-wave amplitude and QT interval are derived from patient cardiac signals. Then blood glucose levels are determined based on a combination of the T-wave amplitude and the QT interval. By using a combination of both T-wave-based and QT interval-based signals, blood glucose levels can be reliably detected throughout a wide range of blood glucose levels. Once the blood glucose level has been detected, the implanted device compares the blood glucose level against upper and lower acceptable bounds and appropriate warning signals are generated if the level falls outside the bounds. In one example, wherein an implantable insulin pump is additionally provided, the pump is controlled based on the detected blood glucose level to maintain glucose levels within an acceptable range. A calibration technique is also provided for determining patient-specific parameters for use in the detection of blood glucose levels.

A connector and coaxial cable interconnectable via axial compression upon a cylindrical section of a solid outer conductor of the cable. The cylindrical section may be formed in the cable by drawing a cable end into an interference fit between a sleeve and an outer conductor seat formed in the connector body. Alternatively, the cylindrical section may be formed in the outer conductor during cable manufacture and the cylindrical section retained between the outer conductor seat and a crimp ring radially deformed by an angled die face during axial compression. To increase flexibility of a straight walled cable, annular corrugations may be formed in the solid outer conductor with the cylindrical sections at each corrugation peak. The cylindrical section having a length of at least 3 millimeters or 4 times the corrugation depth.

A method of determining a filling level of a product contained in a tank, the method comprising generating and transmitting electromagnetic signals; propagating the transmitted electromagnetic signals towards a surface of the product contained in the tank; receiving echo signals resulting from reflections at impedance transitions encountered by the transmitted electromagnetic signals, including a surface echo signal resulting from reflection at a surface of the product; determining a position of a reference impedance transition using a reference echo signal resulting from reflection of the transmitted electromagnetic signals at the reference impedance transition; determining an update level located above the surface, based on the determined position of the reference impedance transition and a known position of the reference impedance transition; determining a disturbance echo profile using at least one of the echo signals resulting from reflection of the transmitted signals at at least one impedance transition located above the update level; and determining the filling level based on the received echo signals and the disturbance echo profile.

A level shifting circuit, satisfying a requirement of a high tolerated dV / dt level, and a highly reliable inverter circuit, wherein a set pulse signal and a reset pulse signal, both of which are level-shifted to a potential side taking as reference a reference potential of a gate control terminal of a switching terminal, are obtained differentially and integrated, and, in case these pulse signals equal or exceed stipulated integrated values, are transmitted as regular control signals controlling the on / off state.

A solid-state imaging device includes: a pixel array unit having arranged unit pixels, each having a charge generator generating signal charges, and a signal output unit having a charge transfer unit, and generating and outputting a processing-target signal corresponding to the signal charges; a driving controller driving the unit pixels, the driving controller sequentially driving the charge transfer unit; and a transfer driving voltage setting unit setting, on the basis of a pixel signal based on a saturated charge amount of the charge generator and a pixel signal based on an intermediate voltage retained charge amount retained in the charge generator after intermediate transfer in which charge transfer is performed at a level between a complete transfer level and an off level, the level of the intermediate voltage such that an actual intermediate voltage retained charge amount becomes the expectation value of the intermediate voltage retained charge amount.

Stability of a circuit operation in a monolithic gate driver is improved. A bistable circuit is provided with a charge replenishment circuit (71) including: a capacitor (CAP2); a thin-film transistor (MA) having a first electrode supplied with a first clock for charge replenishment (CKA), a second electrode connected to a third-node (N3) connected to one end of the capacitor (CAP2), and a third electrode connected to a second-node (N2) to be maintained at the high level during a normal operation period; and a thin-film transistor (MB) having a first electrode supplied with a second clock for charge replenishment (CKB), a second electrode supplied with a high-level DC power supply potential (VDD), and a third electrode connected to the third-node (N3). The first clock for charge replenishment (CKA) and the second clock for charge replenishment (CKB) are alternately driven to the high level so as to eliminate a period in which “the first clock for charge replenishment (CKA) is at the high level and the second clock for charge replenishment (CKB) is at the high level”.