134results about How to "Improve driving reliability" patented technology

In a gate drive circuit including stages which are cascaded and which output gate signals each of the stages includes a first node, an output part, a first holding part and a second holding part. A voltage of the first node is converted to a high voltage in response to one of a vertical start signal and a carry signal of one of previous stages. The output part outputs a first clock signal as a gate signal through an output terminal in response to the high voltage of the first node. The first holding part applies a first low voltage to the output terminal, in response to a gate signal output from at least one of following stages. The second holding part applies a second low voltage, which is less than the first low voltage, to the first node in response to a gate signal output from at least one stage among following stages.

A multi-primary color display device includes a unit pixel part, a plurality of data lines, a plurality of pads and a plurality of connection lines. The unit pixel part is disposed on a display area and includes at least four subpixels. The data lines extend in a first direction on display area, and are electrically connected to the subpixels. The pads are arranged in a second direction perpendicular to the first direction on a peripheral area surrounding the display area, and are electrically connected to a driving chip. The connection lines connect the data lines to the pads disposed on the peripheral area. Each of the connection lines has a same line resistance.

A shift register includes a first transistor supplying an output terminal with a clock signal input to a first clock terminal and a second transistor discharging the output terminal. Defining the gate node of the first transistor as a first node, and the gate node of the second transistor as a second node, the shift register includes an inverter circuit in which the first node serves as its input node and a capacitive element serves as a load, and a buffer circuit receiving the output from the inverter circuit and outputting a signal to the second node.

A display panel assembly includes a display panel, a source printed circuit board (“PCB”), a main path unit, and a sub path unit. The display panel displays an image in response to a data signal and a gate signal generated based on a driving voltage. The source PCB is disposed in a peripheral region of the display panel and mounts a driving circuit unit outputting the driving voltage. The main path unit transmits the driving voltage to the display panel, and the sub path unit transmits the driving voltage to the display panel. Therefore, drive reliability may be improved by employing a sub path unit additionally transmitting the gate driving voltage to the display panel.

A gate driving circuit includes a first shift register and a second shift register for driving odd gate lines. The first shift register includes a first plurality of cascade-connected stages that sequentially output a plurality of first gate signals. A first stage of the first shift register receives a first vertical start signal. The second shift register includes a second plurality of cascade-connected stages to sequentially output a plurality of second gate signals. The first stage of the second shift register receives an output signal of the first stage of the first shift register as its vertical start signal. A data charging rate may be improved by ensuring the timing margin of each gate signal, so that the driving reliability of the gate driving circuit may be improved.

A gate drive circuit includes a shift register having stages connected to each other in series. An (m)-th stage (‘m’ is a natural number) includes an output part, a discharging part, a first holding part and a second holding part. The output part outputs the first clock signal as a gate signal in response to a first clock signal provided from an external device and discharges the gate signal in response to a second input signal. The output part includes a first transistor having a first channel length. The discharging part discharges a signal of the first node to the second voltage level. The first holding part maintains a signal of the first node at a level of the gate signal, and is discharged to the second voltage level. The first holding part includes a second transistor having a second channel length that is longer than the first channel length. The second holding part maintains a signal of the first node at a level of the second voltage level.

A hard disk drive utilizes hard disks that recover the historically unused read / write space or real estate located in the load / unload zone. Approximately one-half of the load / unload zone is recovered and available for reading and writing operations by forming a first or radially outermost read / write track beginning immediately adjacent to the inner radial edge of the load / unload zone and proceeding radially inward from there to the conventional location of first tracks in the prior art. In another version of the invention, almost the entire load / unload zone is recovered and available for reading and writing operations by aligning the first track with the center of the load / unload zone and proceeding radially inward from there as described above. Both of these versions make significant additional surface area on the disk available where, in the prior art, no data was stored, thereby increasing the efficiency and storage capacity of the hard disk drive.

A generally diamond-shaped detection electrode is formed in the approximate center of the piezoelectric element. The strain resulting from the bending secondary vibration mode in the vicinity of the detection electrode is minimized because the detection electrode is formed in such a manner as to include a vibrational node of the longitudinal primary vibrational mode and a vibrational node of the bending secondary vibrational mode. As a result, when the phase difference between the drive signal and the detection signal is detected, the effect of vibration in the bending secondary vibration mode on the detected phase difference can be suppressed and a single drive frequency can be determined with respect to a prescribed phase difference. Thus, the drive performance of the vibrating body with respect to a driven body (i.e., a body driven by the vibrating body) can be reliably improved because, by controlling the drive frequency such that the phase difference equals a prescribed value, the vibrating body can be made to vibrate at a desired frequency and vibrate in such a manner that the desired vibration components are achieved in each vibration mode.

A method of driving gate lines is used to activate the gate lines by outputting output signals of stages to the gate lines. A first node is boosted up based upon a carry signal or the vertical start signal from a previous stage. A gate signal that is pulled up is outputted through an output terminal of a present stage based upon a first clock signal which is boosted up. An off-voltage is outputted through the output terminal of the present stage in response to an output signal from a next stage or the vertical start signal. The first node is discharged in response to the output signal from the next stage or a carry signal from a last stage. A positive ripple voltage at the first node is removed by providing a negative ripple voltage to the first node.

A method for processing image data, the image data including a plurality of sub color data corresponding to a plurality of unit pixels in a row direction, wherein each unit pixel includes N sub color data having different colors, wherein N is a natural number greater than or equal to 2, includes; storing one sub color datum of the plurality of the sub color data corresponding to the unit pixels via dividing the plurality of the sub color data one by one into an individual sub color datum corresponding to a single pixel, and reading the stored sub color data, binding up the stored sub color data two by two, and storing two sub color data bound up with each other.

A gate driving circuit includes a first shift register and a second shift register for driving odd gate lines. The first shift register includes a first plurality of cascade-connected stages that sequentially output a plurality of first gate signals. A first stage of the first shift register receives a first vertical start signal. The second shift register includes a second plurality of cascade-connected stages to sequentially output a plurality of second gate signals. The first stage of the second shift register receives an output signal of the first stage of the first shift register as its vertical start signal. A data charging rate may be improved by ensuring the timing margin of each gate signal, so that the driving reliability of the gate driving circuit may be improved.

A method for driving a gas electric discharge device which has a first electrode and a second electrode and is constructed such that a wall voltage is capable of being produced between the first and second electrodes. The method includes applying a voltage monotonously rising from a first set value to a second set value, between the first and second electrodes, thereby to generate a plurality of gas electric discharges so as to decrease the wall voltage for charge adjustment during the voltage rise.

A hard disk drive utilizes hard disks that recover the historically unused read / write space or real estate located in the load / unload zone. Approximately one-half of the load / unload zone is recovered and available for reading and writing operations by forming a first or radially outermost read / write track beginning immediately adjacent to the inner radial edge of the load / unload zone and proceeding radially inward from there to the conventional location of first tracks in the prior art. In another version of the invention, almost the entire load / unload zone is recovered and available for reading and writing operations by aligning the first track with the center of the load / unload zone and proceeding radially inward from there as described above. Both of these versions make significant additional surface area on the disk available where, in the prior art, no data was stored, thereby increasing the efficiency and storage capacity of the hard disk drive.

A multi-primary color display device includes a unit pixel part, a plurality of data lines, a plurality of pads and a plurality of connection lines. The unit pixel part is disposed on a display area and includes at least four subpixels. The data lines extend in a first direction on display area, and are electrically connected to the subpixels. The pads are arranged in a second direction perpendicular to the first direction on a peripheral area surrounding the display area, and are electrically connected to a driving chip. The connection lines connect the data lines to the pads disposed on the peripheral area. Each of the connection lines has a same line resistance.