446results about How to "Efficient coding" patented technology

The present invention provides a method and apparatus for the production and labeling of objects in a manner suitable for the prevention and detection of counterfeiting. Thus, the system incorporates a variety of features that make unauthorized reproduction difficult. In addition, the present invention provides an efficient means for the production of labels and verification of authenticity, whereby a recording apparatus which includes a recording medium, having anisotrophic optical domains, along with a means for transferring a portion of the recording medium to a carrier, wherein a bulk portion of the recording medium has macroscopically detectable anisotrophic optical properties and the detecting apparatus thereon.

The present invention provides a method and apparatus for the production and labeling of objects in a manner suitable for the prevention and detection of counterfeiting. Thus, the system incorporates a variety of features that make unauthorized reproduction difficult. In addition, the present invention provides an efficient means for the production of labels and verification of authenticity, whereby a recording apparatus which includes a recording medium, having anisotrophic optical domains, along with a means for transferring a portion of the recording medium to a carrier, wherein a bulk portion of the recording medium has macroscopically detectable anisotrophic optical properties and the detecting apparatus thereon.

A RISC processor implements an instruction set which, in addition to optimizing a relationship between the number of instructions required for execution of a program, clock period and average number of clocks per instruction, also is designed to optimize the equation S=IS * BI, where S is the size of program instructions in bits, IS is the static number of instructions required to represent the program (not the number required by an execution) and BI is the average number of bits per instruction. Compared to conventional RISC architectures, this processor lowers both BI and IS with minimal increases in clock period and average number of clocks per instruction. The processor provides good code density in a fixed-length high-performance encoding based on RISC principles, including a general register with load / store architecture. Further, the processor implements a simple variable-length encoding that maintains high performance.

A method and apparatus for efficiently encoding diverse flags being used in a multilayer-based scalable video codec, based on an inter-layer correlation. The encoding method includes judging whether flags of a current layer included in a specified unit area are all equal to flags of a base layer, setting a specified prediction flag according to the result of judgment, and if it is judged that the flags of the current layer are equal to the flags of the base layer, skipping the flags of the current layer and inserting the flags of the base layer and the prediction flag into a bitstream.

A method and a system for information extraction from Web pages formatted with markup languages such as HTML [8]. A method and system for interactively and visually describing information patterns of interest based on visualized sample Web pages [5,6,16-29]. A method and data structure for representing and storing these patterns [1]. A method and system for extracting information corresponding to a set of previously defined patterns from Web pages [2], and a method for transforming the extracted data into XML is described. Each pattern is defined via the (interactive) specification of one or more filters. Two or more filters for the same pattern contribute disjunctively to the pattern definition [3], that is, an actual pattern describes the set of all targets specified by any of its filters. A method and for extracting relevant elements from Web pages by interpreting and executing a previously defined wrapper program of the above form on an input Web page [9-14] and producing as output the extracted elements represented in a suitable data structure. A method and system for automatically translating said output into XML format by exploiting the hierarchical structure of the patterns and by using pattern names as XML tags is described.

A processor can achieve high code density while allowing higher performance than existing architectures, particularly for Digital Signal Processing (DSP) applications. In accordance with one aspect, the processor supports three possible instruction sizes while maintaining the simplicity of programming and allowing efficient physical implementation. Most of the application code can be encoded using two sets of narrow size instructions to achieve high code density. Adding a third (and larger, i.e. VLIW) instruction size allows the architecture to encode multiple operations per instruction for the performance critical section of the code. Further, each operation of the VLIW format instruction can optionally be a SIMD operation that operates upon vector data. A scheme for the optimal utilization (highest achievable performance for the given amount of hardware) of multiply-accumulate (MAC) hardware is also provided.

A left-eye image signal and a right-eye image signal are supplied to a pixel structure converter of a stereoscopic image pre-processor, and multiplexed, so to form one image, an interlace image is formed by a frame / field converter, encoded in an MPEG format by an MPEG encoding unit, stored into a storage and transmitted outward by a transmitting / recording unit. The encoded stereoscopic image signal received from the outward and reproduced from the storage is decoded by am MPEG decoding unit after going through a receiving / reproducing unit, the interlace image is reproduced, returned to the frame image by a field / frame converter of a stereoscopic image post-processor, and reproduced as the left-eye image signal and the right-eye image signal and output by the pixel structure converter.

A method and an apparatus for encoding a multiview video using a minimum amount of information regarding the multiview video are provided. The method includes: categorizing a plurality of B frames into at least two groups according to a predetermined standard; and sequentially encoding the categorized B frames. Therefore, a multiview video which is realistic can be simultaneously provided to many people using a minimum amount of information regarding the multiview video.

A method of compressing video data having at least one frame having at least one block and each block having an array of pixels is provided. The method transforms the pixels of each block into coefficients and creates an optimal transmission order of the coefficients. The method also optimizes the speed of processing compressed video data by partitioning the data bitstream and coding each partition independently. The method also predicts fractional pixel motion by selecting an interpolation method for each given plurality or block of pixels depending upon at least one metric related to each given block and varies the method from block to block. The method also enhances error recovery for a current frame using a frame prior to the frame immediately before the current frame as the only reference frame for lessening quality loss during data transmission. Enhanced motion vector coding is also provided.

Systems and methods for reducing bit rates by replacing original texture in a video sequence with synthesized texture. Reducing the bit rate of the video sequence begins by identifying and removing selected texture from frames in a video sequence. The removed texture is analyzed to generate texture parameters. New texture is synthesized using the texture parameters in combination with a set of constraints. Then, the newly synthesized texture is mapped back into the frames of the video sequence from which the original texture was removed. The resulting frames are then encoded. The bit rate of the video sequence with the synthesized texture is less than the bit rate of the video sequence with the original texture. Also, the ability of a decoder to decode the new video sequence is not compromised because no assumptions are made about the texture synthesis capabilities of the decoder.