Transistor and manufacturing method thereof

Abstract

The invention discloses a transistor and a manufacturing method thereof. The manufacturing method mainly comprises the following steps: sequentially forming a carbon nanotube, a dummy gate electrode and a mask layer on a substrate; forming a side wall covering the side wall of the dummy gate; forming an electrical contact on the carbon nanotubes; forming a sacrificial layer at least covering the side walls; carrying out planarization processing on the sacrificial layer to enable the height difference between the dummy gate and the side wall to be within a preset range; replacing the dummy gatewith a gate stack structure; removing the sacrificial layer; forming an etching barrier layer covering the electric contact, the gate stack structure and the side wall; forming an interlayer dielectric layer covering the etching barrier layer; and forming a plurality of contact holes penetrating through the interlayer dielectric layer and the etching barrier layer. The sacrificial layer is subjected to planarization processing, so that the height difference between the dummy gate and the side wall is within a preset range, and then the remaining sacrificial layer is removed, and the etching barrier layer is deposited, so that the whole gate stack structure and the source-drain contact area can be surrounded, and the breakdown phenomenon of the edge of the gate stack structure and the contact hole electric connection structure can be prevented.

Description

technical field [0001] The present disclosure relates to the field of semiconductor integrated circuit device manufacturing, and more particularly, to a carbon nanotube device and a manufacturing method thereof. Background technique [0002] Carbon nanotubes (CNTs) have the advantages of high speed and low power consumption, and are considered to be one of the best channel materials for constructing field effect transistors in the future. [0003] At present, undoped high-performance perfectly symmetrical CMOS circuits have been realized on carbon nanotube devices. This is different from the mainstream silicon-based integrated circuit manufacturing technology. It does not need to introduce ion implantation for doping adjustment in the entire manufacturing process. Hence the term "undoped" carbon nanotube CMOS technology. This method can directly realize the regulation of the transistor device, greatly saves the process steps and reduces the production cost. [0004] Howeve...

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Problems solved by technology

[0005] Contact issues due to lithography or alignment errors, and damage to source / drain metal and gate electrodes from plasma etch processes

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