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Stack gate enhanced GaN high-electron-mobility transistor containing ferroelectric gate dielectric and preparation method

A high electron mobility, ferroelectric gate dielectric technology, applied in the field of microelectronics, can solve the problems of device characteristics and reliability impact, poor process repeatability, and can not be completely eliminated, so as to avoid secondary pollution and reduce process Effect of temperature, damage avoidance

Active Publication Date: 2017-11-21
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Whether it is groove etching or fluorine ion implantation, it will cause a certain degree of damage to devices and materials.
Although the damage can be reduced or repaired by some methods, it cannot be completely eliminated. The damage caused by etching and ion implantation will affect the characteristics and reliability of the device to a certain extent.
[0010] Secondly, the controllability of the threshold is poor
Since the etching rate and the dose of fluorine ion implantation do not have a stable corresponding relationship with the threshold, the repeatability of the process is not good, and the controllability of the threshold is poor.

Method used

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  • Stack gate enhanced GaN high-electron-mobility transistor containing ferroelectric gate dielectric and preparation method
  • Stack gate enhanced GaN high-electron-mobility transistor containing ferroelectric gate dielectric and preparation method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0036] Embodiment 1, a stacked gate-enhanced GaN high electron mobility transistor with an AlN dielectric insertion layer 81 having a thickness of 2 nm and a HfZrO ferroelectric layer 82 having a thickness of 20 nm is fabricated on a sapphire substrate.

[0037]In the present invention, the initial material for fabricating high electron mobility transistors containing stacked gate enhanced GaN is a purchased epitaxial substrate, which sequentially includes a substrate 1, an AlN nucleation layer 2, a GaN buffer layer 3, AlN insertion layer 4 , AlGaN barrier layer 5 and GaN cap layer 6 .

[0038] In step 1, the source electrode 10 and the drain electrode 11 are fabricated on the GaN buffer layer 3 of the epitaxial substrate.

[0039] 1a) Photoetching the source electrode region and the drain electrode region on the GaN cap layer 6:

[0040] First, bake the epitaxial substrate on a hot plate at 200°C for 5 minutes;

[0041] Then, apply and spin the peeling glue on the GaN cap l...

Embodiment 2

[0116] Embodiment two, making Al on SiC substrate 2 o 3 The thickness of the dielectric insertion layer 81 is 1nm, and the thickness of the HfZrO ferroelectric layer 82 is 25nm. The stacked gate enhanced GaN high electron mobility transistor.

[0117] In step one, the source electrode 10 and the drain electrode 11 are fabricated on the GaN buffer layer 3 of the epitaxial substrate.

[0118] 1.1) Photoetching the region of the source electrode 10 and the region of the drain electrode 11 on the GaN cap layer 6:

[0119] The concrete realization of this step is identical with the step 1a) among the embodiment one;

[0120] 1.2) Evaporate the source electrode 10 and the drain electrode 11 on the GaN cap layer 6 in the region of the source electrode 10 and the region of the drain electrode 11 and on the photoresist outside the region of the source electrode 10 and the region of the drain electrode 11:

[0121] The concrete realization of this step is identical with the step 1b) ...

Embodiment 3

[0151] Embodiment 3, a laminated gate-enhanced GaN high electron mobility transistor with a thickness of 2.5 nm for the AlN dielectric insertion layer 81 and a thickness of 30 nm for the HfZrO gate dielectric 8 is fabricated on the Si substrate.

[0152] In step A, the source electrode 10 and the drain electrode 11 are fabricated on the GaN buffer layer 3 of the epitaxial substrate.

[0153] The specific implementation of this step is the same as step 1 in the first embodiment.

[0154] Step B, photoetching the electrical isolation region of the active region on the GaN cap layer 6 , and using an ion implantation process to fabricate the electrical isolation of the active region of the device.

[0155] The specific implementation of this step is the same as step 2 in the second embodiment.

[0156] In step C, a SiN passivation layer 7 is grown on the source electrode 10 , the drain electrode 11 and the GaN cap layer 6 in the active region by PECVD.

[0157] C1) Clean the sur...

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PUM

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Abstract

The invention discloses a stack gate enhanced GaN high-electron-mobility transistor containing a ferroelectric gate dielectric, which mainly solves a problem of poor reliability of the existing similar devices. The stack gate enhanced GaN high-electron-mobility transistor comprises a substrate, an AlN nucleation layer, a GaN buffer layer, an AlN insertion layer, an AlGaN barrier layer, a GaN cap layer, an SiN passivation layer, a gate dielectric layer and an SiN protection layer from the bottom up, wherein the SiN passivation layer is provided with a concave structure, the inner wall of the concave structure and the surface of the SiN passivation layer are provided with the gate dielectric layer, the gate dielectric layer comprises an AlN or Al2O3 dielectric insertion layer and an HfZrO ferroelectric layer, two ends of the GaN buffer layer are provided with a source electrode and a drain electrode respectively, the middle of the gate dielectric layer is provided with a gate electrode, the source electrode and the drain electrode are provided with a metal interconnection layer, and the gate electrode and the gate dielectric layer at the surface of the passivation layer are covered with the SiN protection layer. According to the invention, the reliability of the device is improved, gate leakage of the enhanced device is reduced, and the transistor can be used as a switching device requiring high threshold voltage.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, and in particular relates to a method for preparing a laminated gate enhanced GaN high electron mobility transistor, which can be used as a switching device requiring a relatively large threshold voltage. Background technique [0002] GaN has the characteristics of large band gap, high critical field strength, high thermal conductivity, high carrier saturation rate, etc., and is widely used in high temperature, high frequency and microwave power devices. The high two-dimensional electron gas density and high electron mobility in the AlGaN / GaN heterostructure make it have a very good application prospect in high-power microwave devices. [0003] Due to the high two-dimensional electron gas density, AlGaN / GaN are usually depletion devices, showing normally-on characteristics. From the perspective of simplifying circuit design and safety, enhanced devices have better potential. As a power...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/423H01L21/335H01L29/778
CPCH01L29/42316H01L29/66462H01L29/778
Inventor 马晓华陈丽香祝杰杰杨凌刘捷龙
Owner XIDIAN UNIV
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