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VDMOS (Vertical Double-diffusion Metal Oxide Semiconductor Structure) device and manufacturing method thereof

A device manufacturing method and device technology, which are used in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of low theoretical value of VDMOS device electrical properties, improve electrical properties, reduce on-resistance, improve The effect of utilization

Active Publication Date: 2012-05-23
CSMC TECH FAB2 CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] However, in actual use, the electrical properties of the VDMOS device with the above structure are often lower than the theoretical value

Method used

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  • VDMOS (Vertical Double-diffusion Metal Oxide Semiconductor Structure) device and manufacturing method thereof
  • VDMOS (Vertical Double-diffusion Metal Oxide Semiconductor Structure) device and manufacturing method thereof
  • VDMOS (Vertical Double-diffusion Metal Oxide Semiconductor Structure) device and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0046] Based on this, the first embodiment of the present invention provides a VDMOS device whose structure is as follows figure 2 Shown, including:

[0047] A substrate, the substrate includes a body layer 201 and an epitaxial layer 202 located on the body layer, and the body layer includes a drain region;

[0048] The isolation region 203 located in the epitaxial layer 202. Generally, the isolation region 203 is located in the surface of the epitaxial layer 202, and there is no isolation region material on the surface of the epitaxial layer 202;

[0049] The first body region 204 and the second body region 205 in the epitaxial layer located on both sides of the isolation region 203, the doping state of the first body region 204 and the second body region 205 is the same as that of the epitaxial layer The conductivity type of doped ions is opposite;

[0050] The first source region 206 located in the first body region 204, the second source region 207 located in the second body regi...

Embodiment 2

[0064] This embodiment discloses the manufacturing method of the VDMOS device described in the previous embodiment, Figure 3 to Figure 12 For the cross-sectional view of each step of the method, this embodiment only takes an N-type VDMOS device as an example for description. The method includes the following steps:

[0065] Such as image 3 As shown, a substrate is provided. The substrate includes a body layer 301 and an epitaxial layer 302 on the body layer 301. The body layer 301 includes a drain region. The body layer 301 and the epitaxial layer 302 in this embodiment are N-type doped ;

[0066] It should be noted that the substrate in this embodiment may include semiconductor elements, such as silicon or silicon germanium (SiGe) with a single crystal, polycrystalline or amorphous structure, or a mixed semiconductor structure, such as silicon carbide and indium antimonide. , Lead telluride, indium arsenide, indium phosphide, gallium arsenide or gallium antimonide, alloy semicon...

Embodiment 3

[0092] The manufacturing method of the VDMOS device disclosed in this embodiment is different from the method of forming the isolation region in the previous embodiment. In this embodiment, the step of forming the isolation region in the surface of the epitaxial layer includes:

[0093] Step 1: forming an opening in the surface of the epitaxial layer;

[0094] In this embodiment, a photolithography process can be used to form a pattern of openings on the surface of the epitaxial layer, and then the photoresist layer with the openings is used as a mask to etch away the epitaxial layer material at the openings to form a pattern on the surface of the epitaxial layer. Form an opening.

[0095] Step 2: Cover the surface of the epitaxial layer with an isolation layer to fill the opening with isolation layer material;

[0096] In this embodiment, chemical vapor deposition or physical vapor deposition may be used to cover the surface of the epitaxial layer with an isolation layer, and HDP (Hi...

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Abstract

The embodiment discloses a VDMOS (Vertical Double-diffusion Metal Oxide Semiconductor Structure) device and a manufacturing method thereof. The device comprises a substrate, an isolating area, a first body area, a second body area, a first source area, a second source area and a gate area, wherein the substrate comprises a body layer and an epitaxial layer positioned above the body layer; the body layer comprises a drain area; the isolating area is positioned in the epitaxial layer; the first body area and the second body area are positioned in the epitaxial layer at two sides of the isolating area; the first source area is positioned in the first body area; the second source area is positioned in the second body area; and the gate area is positioned between the first source area and the second source area and above the isolating area. The insulated isolating area is formed in the epitaxial layer between the first body area and the second body area, a transition zone where a conductive channel diffuses toward the epitaxial layer area between the first body area and the second body area is eliminated, a parasitic resistor of the VDMOS device is eliminated, the total conduction resistor of the device is reduced, and the electricity of the device is improved. In addition, because of the disappearance of the parasitic resistor, the occupation area of the device cell is reduced, and the utilization ratio of the substrate surface is improved.

Description

Technical field [0001] The present invention relates to the technical field of semiconductor manufacturing, and more specifically, to a VDMOS device and a manufacturing method thereof. Background technique [0002] With the continuous development of semiconductor technology, VDMOS (Vertical Double-diffuse MOS) devices have low switching loss, high input impedance, low drive power, good frequency characteristics, and highly linear transconductance. And other advantages, are more and more widely used in analog circuits and drive circuits, especially high-voltage power parts. [0003] The existing VDMOS device structure is as figure 1 As shown, take the N-type VDMOS device as an example, including: [0004] A substrate, the substrate includes a body layer 101 and an epitaxial layer 102 on the body layer, the body layer 101 includes a drain region, wherein the body layer 101 and the epitaxial layer 102 are N-type doped; [0005] The first body region 103 and the second body region 104 lo...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/06H01L21/336
CPCH01L29/66719H01L29/7802H01L29/0653H01L21/26533H01L29/0878
Inventor 王乐
Owner CSMC TECH FAB2 CO LTD
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