51results about "Volume compression/expansion without controlling loop" patented technology

The invention relates to a method and an arrangement intended for radio communication systems and effective in digitalizing and subsequently processing numerically arbitrary radio signals. The signals are represented by composite (complex) vectors which have been subjected to disturbances in the system, such that information in the signals has been lost. This information is restored in its entirety when practising the present invention. For the purpose of solving this problem, the inventive digitalizing arrangement includes a multistage logarithmic amplifier chain (A) in which each stage is connected to a separate detector (D), the output signals of which are added in an adder. The adder output signals are then transmitted to a first A / D-converter (AD1) for digitalizing and converting the amplitude components of the signal. At the same time, the undetected signal from the saturated output stage in the amplifier chain is transmitted to a second A / D-converter for digitalizing and converting the phase components of the signal. The digital values obtained on the outputs of the AD-converters (AD1, AD2) are applied to different inputs of a digital signal processor (MP) for numerical processing of the pairwise received digital values in a manner such as to restore the complete vector characteristic of the signal.

A low noise amplifier (500) includes a first transconductance device (326) having a control electrode for receiving a first input signal, and a first current electrode; a first load device (322) having a first terminal coupled to a first power supply voltage terminal and a second terminal coupled to the first current electrode of the first transconductance device (326) and forming a first output voltage signal; a second transconductance device (336) having a control electrode for receiving a second input signal, and a second current electrode; a second load device (332) having a first terminal coupled to the first power supply voltage terminal and a second terminal coupled to the first current electrode of the second transconductance device (336) and forming a second output voltage signal; and an attenuation device (340) coupled between the first current electrodes of the first (326) and second (336) transconductance devices and having a control input terminal for receiving a control voltage thereon.

The present invention provides a power amplifier module featuring that: its output power characteristic smoothly changes as the input control voltage changes; and its control sensitivity is stable over a wide dynamic range. By same means, idling current for gain setting is supplied to a single amplifier element or all of multiple stages of amplifier elements of the power amplifier module. By making this idling current behave so as to exponentially change, relative to input control voltage, the invention enables output power control proportional to the input control voltage.

An electronic signal processor for processing signals includes a complex first filter, one or more gain stages and a second filter. The first filter is characterized by a frequency response curve that includes multiple corner frequencies, with some corner frequencies being user selectable. The first filter also has at least two user-preset gain levels which may be alternately selected by a switch. Lower frequency signals are processed by the first filter with at least 12 db / octave slope, and preferably with 18 db / octave slope to minimize intermodulation distortion products by subsequent amplification in the gain stages. A second filter provides further filtering and amplitude control. The signal processor is particularly suited for processing audio frequency signals. Related methods include filtering the input signal with an input filter of the second or third order high pass type, amplifying the filtered signal and further filtering the amplified signal with a low pass filter, which may be of the second order type.

An automatic gain control (AGC) circuit includes a number of attenuation circuits connected in series relative to a reception signal, a of variable gain amplifiers to which the reception signal and each output signal from the attenuation circuits are fed, respectively, a signal deriving circuit connected to output terminals of the variable gain amplifiers for deriving a level-controlled output signal, and a control current generating circuit for generating a control current having a predetermined characteristic out of first and second AGC voltages, wherein the control current outputted from the control current generating circuit is supplied to the variable gain amplifiers as a control signal for switching an operation thereof and for controlling a gain thereof, and a feedback control current corresponding to the control current is performed by the control current generating circuit.

A complementary metal-oxide semiconductor (CMOS) variable gain amplifier includes: a cascode amplifier including a common source field effect transistor and a common gate field effect transistor in a cascode structure; a first current generation unit connected in parallel to a drain of the common gate field effect transistor and configured to vary transconductance of the cascode amplifier; a second current generation unit connected to a common source of the cascode amplifier and configured to control a bias current of the cascode amplifier; a current control unit configured to generate a current control signal for the first and second current generation units; and a load stage connected in series to a drain of the cascode amplifier and configured to output an output current, which is varied by the overall transconductance of the cascode amplifier, as a differential output voltage.

A low noise amplifier (500) includes a first transconductance device (326) having a control electrode for receiving a first input signal, and a first current electrode; a first load device (322) having a first terminal coupled to a first power supply voltage terminal and a second terminal coupled to the first current electrode of the first transconductance device (326) and forming a first output voltage signal; a second transconductance device (336) having a control electrode for receiving a second input signal, and a second current electrode; a second load device (332) having a first terminal coupled to the first power supply voltage terminal and a second terminal coupled to the first current electrode of the second transconductance device (336) and forming a second output voltage signal; and an attenuation device (340) coupled between the first current electrodes of the first (326) and second (336) transconductance devices and having a control input terminal for receiving a control voltage thereon.

The variable transconductance circuit includes: a voltage-current conversion circuit for outputting a current signal linear with an input voltage signal; first and second MOS transistors for converting the current signal received to a square-root compressed voltage signal; and third and fourth MOS transistors for converting the square-root compressed voltage signal to a linear current signal. A bias current at the first and second MOS transistors and a bias current at the third and fourth MOS transistors are varied to control transconductance.

Aspects of a method and system for extending dynamic range of an RF signal are provided. In this regard, a signal representative of an amplitude of a pair of baseband signals may be generated. The amplitude of the generated signal may be expanded, and the amplitude of the baseband signals may be compressed. In this regard, the compression and the expansion may be inverse functions of each other. Additionally, the compressed baseband signals may be combined to generate an intermediate signal which may be amplitude modulated by the expanded signal. The amplitude modulation may result from controlling a gain, a voltage source, and / or a current source of a power amplifier. The intermediate signal may be generated by up-converting the baseband signals and subsequently combining the up-converted signals.

Provided are input-gain control apparatus and method of an audio amplifier. A gain of an acoustic signal is automatically attenuated based on a pre-set limited level to minimize distortion of the acoustic signal caused by clipping of the acoustic signal, and thereby limit an over-input of the acoustic signal to input the acoustic signal within a dynamic range if the acoustic signal is not input within the dynamic range in an audio apparatus including an acoustic amplifier and a switching amplifier. Thus, only a gain of an over-input signal on a specific level or more can be attenuated while an original form of the over-input signal is maintained to minimize distortion of an output waveform caused by clipping of the output waveform. Also, a harmonic distortion and a stepped high frequency noise occurring during clipping can be simultaneously removed.

An audio level compressor for compressing the dynamic range of an input audio signal. The audio level compressor can be part of a microphone, or a separate component. The audio level compressor includes input terminals for receiving the input audio signal, a lamp having a filament resistance that is a function of the input audio signal; a load resistance; a signal gain controller that includes a means for increasing dynamic range compression of the input audio signal, and output terminals for providing an output audio signal that is a function of the input audio signal and the signal gain. The signal gain controller provides a signal gain that is a function of the filament resistance and the load resistance. The audio level compressor can also include an expander circuit or a power conditioning circuit. Power can be provided by an internal source or a phantom power supply.

A signal waveform detection circuit includes an amplifier circuit and a comparing circuit. The amplifier circuit has differential amplifiers connected in series. Each of the differential amplifiers has a common connection point. The comparing circuit is connected to the common connection points of the amplifier circuit. The comparing circuit includes comparing units connected to one of the differential amplifiers. Each of the comparing units has a threshold voltage generating circuit for generating signals. Each signal has a threshold voltage that is set between a maximum threshold voltage of a signal output from the corresponding differential amplifier during a maximum amplitude output and a minimum threshold voltage of a signal output from the corresponding differential amplifier during a minimum amplitude output. The comparing unit further has a comparator comparing a voltage at the common connection point with the threshold voltage.

A variable gain amplifier circuit (100) that may have a gain exponentially changed has been disclosed. A variable gain amplifier circuit (100) may include a first OTA (Operational Transconductance Amplifier) (11) and a second OTA (12). A first OTA (11) may receive a differential voltage at input terminals (IN1 and IN2). A second OTA (12) may receive an output from a first OTA (11) and may provide a differential output voltage at output terminals (OUT1 and OUT2). A second OTA (12) may have second OTA input terminals and second OTA output terminals commonly connected to output terminals (OUT1 and OUT2). A small-signal transconductance of the first and second OTAs (11 and 12) may be proportional to driving currents. A first OTA (11) may have a driving current of I0{1+tan h(x / a)} and a second OTA (12) may have a driving current of I0{1-tan h(x / a)}, where -1<x<1 and a is a constant. In this way, a variable gain amplifier circuit (100) may operate at a low voltage, with a small circuit current, and with essentially no temperature dependence.

A complementary metal-oxide semiconductor (CMOS) variable gain amplifier includes: a cascode amplifier including a common source field effect transistor and a common gate field effect transistor in a cascode structure; a first current generation unit connected in parallel to a drain of the common gate field effect transistor and configured to vary transconductance of the cascode amplifier; a second current generation unit connected to a common source of the cascode amplifier and configured to control a bias current of the cascode amplifier; a current control unit configured to generate a current control signal for the first and second current generation units; and a load stage connected in series to a drain of the cascode amplifier and configured to output an output current, which is varied by the overall transconductance of the cascode amplifier, as a differential output voltage.

An audio level compressor for compressing the dynamic range of an input audio signal. The audio level compressor can be part of a microphone, or a separate component. The audio level compressor includes input terminals for receiving the input audio signal, a lamp having a filament resistance that is a function of the input audio signal; a load resistance; a signal gain controller that includes a means for increasing dynamic range compression of the input audio signal, and output terminals for providing an output audio signal that is a function of the input audio signal and the signal gain. The signal gain controller provides a signal gain that is a function of the filament resistance and the load resistance. The audio level compressor can also include an expander circuit or a power conditioning circuit. Power can be provided by an internal source or a phantom power supply.

A mean square power detector in accordance with one or more embodiments includes a gain or attenuation circuit comprising a plurality of gain or attenuation elements arranged for generating a plurality of amplified or attenuated versions of a radio frequency (RF) input signal. The mean square power detector also includes a plurality of mean square detectors coupled to the gain or attenuation circuit. Each of the mean square detectors receives a different one of the plurality of amplified or attenuated versions of the RF input signal. Each of the plurality of mean square detectors generates an output signal representative of the mean square power of the RF input signal for a different input signal level range. A summing element is coupled to the plurality of mean square detectors for combining the output signals of the plurality of mean square detectors to generate a signal representative of the mean square or root mean square of the RF input signal.

A mean square power detector in accordance with one or more embodiments includes a gain or attenuation circuit comprising a plurality of gain or attenuation elements arranged for generating a plurality of amplified or attenuated versions of a radio frequency (RF) input signal. The mean square power detector also includes a plurality of mean square detectors coupled to the gain or attenuation circuit. Each of the mean square detectors receives a different one of the plurality of amplified or attenuated versions of the RF input signal. Each of the plurality of mean square detectors generates an output signal representative of the mean square power of the RF input signal for a different input signal level range. A summing element is coupled to the plurality of mean square detectors for combining the output signals of the plurality of mean square detectors to generate a signal representative of the mean square or root mean square of the RF input signal.

A variable gain amplifier of such configuration that can yield continuously and log-linearly variable gains in relation to control voltage and, at the same time, that does not use an attenuator, an element which otherwise would entail cause of increased noise. The amplifier includes a plurality of gm amplifiers connected in parallel with input signal, exponential multipliers connected respectively to the gm amplifiers, a control section to vary the multiplication coefficient of the exponential multipliers according to the external gain control signal, and an I-V converter circuit to aggregate current output after multiplication and convert the aggregated current output to voltage. A continuously variable gain characteristic can be obtained without the use of an attenuator but by varying multiplication coefficient according to control voltage.

Aspects of a method and system for extending dynamic range of an RF signal are provided. In this regard, a signal representative of an amplitude of a pair of baseband signals may be generated. The amplitude of the generated signal may be expanded, and the amplitude of the baseband signals may be compressed. In this regard, the compression and the expansion may be inverse functions of each other. Additionally, the compressed baseband signals may be combined to generate an intermediate signal which may be amplitude modulated by the expanded signal. The amplitude modulation may result from controlling a gain, a voltage source, and / or a current source of a power amplifier. The intermediate signal may be generated by up-converting the baseband signals and subsequently combining the up-converted signals.

A current canceling CMOS variable gain amplifier includes a first leg and a second leg. The first leg has a first input line, a first output line, a first ON transistor, a first control transistor and a first subtracting transistor. The second leg has a second input line, a second output line, a second ON transistor, a second control transistor and a second subtracting transistor. The second input line can provide a second input current. The second output line can provide a second output current. The first input line is arranged to provide a first input current to each of the first ON transistor, the first control transistor and the first subtracting transistor. The second input line is arranged to provide a second input current to each of the second ON transistor, the second control transistor and the second subtracting transistor. The first output line is in electrical connection with each of the first ON transistor, the first control transistor and the second subtracting transistor. The second output line is in electrical connection with each of the second ON transistor, the second control transistor and the first subtracting transistor.

An integrated circuit includes at least three separate power supply terminals, at least one for those portions of the circuit that must accommodate the widest signal-related voltage excursion, at least one for those that experience substantially smaller signal-related voltage excursions, and a common terminal.

The variable transconductance circuit includes: a voltage-current conversion circuit for outputting a current signal linear with an input voltage signal; first and second MOS transistors for converting the current signal received to a square-root compressed voltage signal; and third and fourth MOS transistors for converting the square-root compressed voltage signal to a linear current signal. A bias current at the first and second MOS transistors and a bias current at the third and fourth MOS transistors are varied to control transconductance.

A variable gain amplifier of such configuration that can yield continuously and log-linearly variable gains in relation to control voltage and, at the same time, that does not use an attenuator, an element which otherwise would entail cause of increased noise. The amplifier includes a plurality of gm amplifiers connected in parallel with input signal, exponential multipliers connected respectively to the gm amplifiers, a control section to vary the multiplication coefficient of the exponential multipliers according to the external gain control signal, and an I-V converter circuit to aggregate current output after multiplication and convert the aggregated current output to voltage. A continuously variable gain characteristic can be obtained without the use of an attenuator but by varying multiplication coefficient according to control voltage.

A system for automatic gain control prevents input overload by precisely controlling the input level of a received, digitally modulated signal without using a variable gain amplifier. A limiting amplifier in conjunction with a logarithmic detector splits an input signal path in two, providing separate phase and amplitude information for downstream digital signal processing, where the separate phase and amplitude information is processed without variable gain artifacts. The separated phase information may further be divided into I and Q signals.

A limit circuit capable of providing high gain. The limit circuit included in an FM receiver comprises, for example, seven amplifiers (11 to 17), and a BPF (18) inserted substantially in the middle thereof. Each of the amplifiers (11 to 17) operates as a differential amplifier, and has a gain of about 13 dB. The BPF (18) serving as a limit circuit passes components in a bandwidth wider than the bandwidth of the signal to be amplified. The level of 1 / f noise and heat noise can be reduced by eliminating low-frequency components and high-frequency components of the Signal amplified by the four amplifiers (11 to 14), respectively. Therefore, each of the amplifiers (15 to 17) connected to the rear end of the BPF (18) is not animated by the noise component.

The present invention relates to an exponential function generator which is realized with only CMOS element without BJT element, not limited by the physical properties of the element or a square circuit, and not complicated in its configuration, and a variable gain amplifier using the same. The exponential function generator includes a voltage-current converter, 1st to nth curve generators for mirroring the current from the voltage-current converter, outputting a current adjusted according to a predetermined ratio, and an output end for outputting the sum of the current from the 1st to nth curve generators. The exponential current generator is configured to generate the current exponentially adjusted according to the control voltage.

a limiting amplifier with a power detection circuit (100) comprises an amplification section having a plurality of amplification inverters (INV1-INVn+1), a detection inverter (INV0) taking in and inverting an output potential of any of the amplification inverters, a diode (170) having an anode connected to an output of the detection inverter, and a detection resister (180) and a capacitor (190) connected in parallel between a cathode of the diode and a ground line. The output voltage of the inverter (INV0) is not reduced by a schottky current and, therefore, an output potential of the inverters INVn-1 is sufficiently amplified and the precise power detection is performed even if an amplitude of an input signal is high.