137 results about "Amorphous oxide semiconductor" patented technology

A thin-film transistor including a channel layer being formed of an oxide semiconductor transparent to visible light and having a refractive index of nx, a gate-insulating layer disposed on one face of the channel layer, and a transparent layer disposed on the other face of the channel layer and having a refractive index of nt, where there is a relationship of nx>nt. A thin-film transistor including a substrate having a refractive index of no, a transparent layer disposed on the substrate and having a refractive index of nt, and a channel layer disposed on the transparent layer and having a refractive index of nx, where there is a relationship of nx>nt>no.

A thin film field effect transistor has at least a gate electrode 2, a gate insulating layer 3, an active layer 4, a source electrode 5-1 and a drain electrode 5-2 on a substrate 1. The active layer includes an amorphous oxide semiconductor including at least In and Zn, a first interface layer 61 is disposed between the gate insulating layer and the active layer such that it is adjacent to at least the active layer, and a second interface layer is disposed on the opposite side of the active layer with respect to the first interface layer such that it is adjacent to the active layer. A content of Ga or Al in the amorphous oxide semiconductor of each of the first interface layer and the second interface layer is higher than a content of Ga or Al in the amorphous oxide semiconductor of the active layer.

A TFT is provided which includes, on a substrate, at least a gate electrode, a gate insulating layer, an active layer containing an amorphous oxide semiconductor, a source electrode and a drain electrode, wherein a resistance layer containing an amorphous oxide and having a thickness of more than 3 nm is disposed between the active layer and at least one of the source electrode or the drain electrode, and a band gap of the active layer is smaller than a band gap of the resistance layer. Also, a display using the TFT is provided.

Semiconductor devices and circuits with use of transparent oxide film are provided. The semiconductor device having a P-type region and an N-type region, wherein amorphous oxides with electron carrier concentration less than 1018 / cm3 is used for the N-type region.

A production method of a thin film transistor including an active layer including an amorphous oxide semiconductor film, wherein a step of forming the active layer includes a first step of forming the oxide film in an atmosphere having an introduced oxygen partial pressure of 1×10−3 Pa or less, and a second step of annealing the oxide film in an oxidative atmosphere after the first step.

This invention provides an amorphous oxide semiconductor thin film, which is insoluble in a phosphoric acid-based etching solution and is soluble in an oxalic acid-based etching solution by optimizing the amounts of indium, tin, and zinc, a method of producing the amorphous oxide semiconductor thin film, etc. An image display device (1) comprises a glass substrate (10), a liquid crystal (40) as a light control element, a bottom gate-type thin film transistor (1) for driving the liquid crystal (40), a pixel electrode (30), and an opposing electrode (50). The amorphous oxide semiconductor thin film (2) in the bottom gate-type thin film transistor (1) has a carrier density of less than 10+18 cm−3, is insoluble in a phosphoric acid-based etching liquid, and is soluble in an oxalic acid-based etching liquid.

A TFT is provided which includes, on a substrate, at least a gate electrode, a gate insulating layer, an active layer containing an amorphous oxide semiconductor, a source electrode, and a drain electrode, wherein a carrier concentration of the active layer is 3×1017 cm−3 or more and a film thickness of the active layer is 0.5 nm or more and less than 10 nm. A TFT is provided which has a low OFF current and a high ON-OFF ratio, and is improved in environmental temperature dependency. Also, a display using the TFT is provided.

Provided is a top gate thin film transistor, including on a substrate: a source electrode layer; a drain electrode layer; an oxide semiconductor layer; a gate insulating layer; a gate electrode layer including an amorphous oxide semiconductor containing at least one kind of element selected from among In, Ga, Zn, and Sn; and a protective layer containing hydrogen, in which: the gate insulating layer is formed on a channel region of the oxide semiconductor layer; the gate electrode layer is formed on the gate insulating layer; and the protective layer is formed on the gate electrode layer.

A thin film transistor (TFT), a method of manufacturing the TFT, and a flat panel display comprising the TFT are provided. The TFT includes a gate, a gate insulating layer that contacts the gate, a channel layer that contacts the gate insulating layer and faces the gate with the gate insulating layer therebetween, a source that contacts an end of the channel layer; and a drain that contacts an other end of the channel layer, wherein the channel layer is an amorphous oxide semiconductor layer, and each of the source and the drain is a conductive oxide layer comprising an oxide semiconductor layer having a conductive impurity in the oxide semiconductor layer. A low resistance metal layer can further be included on the source and drain. A driving circuit of a unit pixel of a flat panel display includes the TFT.

A TFT is provided which includes on a substrate, at least a gate electrode, a gate insulating layer, an active layer containing an amorphous oxide semiconductor, a source electrode, and a drain electrode, wherein a mean square interface roughness between the gate insulating layer and the active layer is less than 2 nm, a carrier concentration of the active layer is 1×1015 cm−3 or more, and a film thickness of the active layer is 0.5 nm or more and less than 20 nm. A TFT is provided which has high field effect mobility and a high ON-OFF ratio, and is improved in environmental temperature dependency. Also, a display using the TFT is provided.

Provided is a thin film transistor including: a first gate electrode; a first gate insulating layer covering the first gate electrode; a semiconductor layer on the first gate insulating layer; a second gate insulating layer on the semiconductor layer; a second gate electrode on the second gate insulating layer; and a drain electrode and a source electrode electrically connected to the semiconductor layer, in which: the semiconductor layer is an amorphous oxide semiconductor containing at least one of Zn, Ga, In, and Sn; the first gate electrode shields light entering the semiconductor layer from below, and the second gate electrode shields light entering the semiconductor layer from above; and the second gate electrode is electrically connected to the first gate electrode by penetrating the first gate insulating layer and the second gate insulating layer, to thereby shield light entering the semiconductor layer from at least one of sides thereof.

There is provided an amorphous oxide semiconductor including hydrogen and at least one element of indium (In) and zinc (Zn), the amorphous oxide semiconductor containing one of hydrogen atoms and deuterium atoms of 1×1020 cm−3 or more to 1×1022 cm−3 or less, and a density of bonds between oxygen and hydrogen except bonds between excess oxygen (OEX) and hydrogen in the amorphous oxide semiconductor being 1×1018 cm−3 or less.

A semiconductor device in which fluctuation in electric characteristics due to miniaturization is less likely to be caused is provided. The semiconductor device includes an oxide semiconductor film including a first region, a pair of second regions in contact with side surfaces of the first region, and a pair of third regions in contact with side surfaces of the pair of second regions; a gate insulating film provided over the oxide semiconductor film; and a first electrode that is over the gate insulating film and overlaps with the first region. The first region is a CAAC oxide semiconductor region. The pair of second regions and the pair of third regions are each an amorphous oxide semiconductor region containing a dopant. The dopant concentration of the pair of third regions is higher than the dopant concentration of the pair of second regions.