40 results about "Actual count" patented technology

A dynamic toolbar operates in conjunction with a web server for presenting links associated with a website requested by a web surfer at a client computer. The web server receives a source URL of a source website requested by the web surfer and compiles a directory of URLs of related websites that may be of interest to the web surfer for selecting therefrom a subset of URLs according to their popularity. Data representative of the subset is uploaded to the client computer for displaying by a web browser thereof. The subset of URLs is selected by accessing the directory to determine a category to which the source URL belongs and extracting from the directory respective URLs of related websites of the category. A Popularity Index is determined by an actual count of redirections from the URL of the source website to the respective URLs of the related websites.

A non-volatile flash memory system counts the occurrences of an event, such as the number of times that individual blocks have been erased and rewritten, by updating a compressed count only once for the occurrence of a large number of such events. Complementary embodiments include updating the compressed count based upon a random number or upon the actual count matching a multiple of the fixed number. These techniques also have application to monitoring other types of recurring events in flash memory systems or in other types of electronic systems. In another aspect of the present invention, provisions are made to maintain an accurate experience count if the memory system experiences an improper shutdown, for example in case of power loss or removal of a memory card.

One or more techniques are provided for programming a flash memory device. In one embodiment, the memory device is programmed such that a data pattern written to a page in the memory device has encoded therein an expected count value corresponding to the number of times a first binary value occurs in the data pattern. The data pattern includes the program data and the expected count value, and is written to the page in a single operation. The expected count value may be stored in a count field in the management area of the page. During a page read operation, the expected count value is compared to the actual count of the number of bits having the first binary value in the data area of the page. If the expected count is equal to the actual count, then the program data is determined to be valid.

The invention relates to a method for operating a counting radiation detector, in particular a counting X-ray detector, with improved linearity, during operation each detector element (14) of the radiation detector (4) is counted depending on providing counting pulses at the counting rate of the number of ray quantum numbers occurring per time unit; converting the counting rate provided by each detector element (14) or part of the detector element (14) into an actual counting rate through a functional relationship, or Multiply by a correction factor that depends on the magnitude of the count rate. Correction coefficients are determined in advance for each detector element (14) or a subsection thereof for the calculation of the count rate due to the dead time of the detector element (14) to the actual number of radiation quanta present per time unit The deviation is corrected. The method of the invention improves the linearity of the counting radiation detector especially under high radiation intensity, and can also meet the linearity condition in X-ray CT equipment.

Described is a technology by which a probability is estimated for a token in a sequence of tokens based upon a number of zero or more times (actual counts) that the sequence was observed in training data. The token may be a word in a word sequence, and the estimated probability may be used in a statistical language model. A discount parameter is set independently of interpolation parameters. If the sequence was observed at least once in the training data, a discount probability and an interpolation probability are computed and summed to provide the estimated probability. If the sequence was not observed, the probability is estimated by computing a backoff probability. Also described are various ways to obtain the discount parameter and interpolation parameters.

A non-volatile flash memory system counts the occurrences of an event, such as the number of times that individual blocks have been erased and rewritten, by updating a compressed count only once for the occurrence of a large number of such events. Complementary embodiments include updating the compressed count based upon a random number or upon the actual count matching a multiple of the fixed number. These techniques also have application to monitoring other types of recurring events in flash memory systems or in other types of electronic systems. In another aspect of the present invention, provisions are made to maintain an accurate experience count if the memory system experiences an improper shutdown, for example in case of power loss or removal of a memory card.

A position sensitive radiation spectrometer for identifying, quantifying, and locating a radioactive source in a target. The position sensitive radiation spectrometer includes an array of gamma-ray detectors arranged along one or more dimensions of a container to be assayed. A known source placed at various calibration positions is used to establish counting efficiencies at various energy levels. From the counting efficiency and the actual count rate, the activity level of an unknown source relative to the calibration positions is calculated. The relative activity levels correlate to the position of unknown source and provide useful information about the actual distribution of radioactive material.

The invention discloses a calibration method and device for a system clock of USB equipment. The method comprises the following steps: taking the system clock of the USB equipment as a clock source of a USB equipment timer in counting function after performing frequency division to the system clock of the USB equipment through utilizing the counting function and capturing function of the USB equipment timer, and taking a low-velocity clock of the USB equipment as a trigger source of the USB equipment timer in capturing function; capturing the jump edge of the trigger source, and obtaining the actual count value of the system clock of a corresponding capturing interval; calibrating the frequency of the system clock of the USB equipment as per the obtained actual count value, a preset theoretic count value and an acceptable error range. According to the invention, the calibration method and device have the benefit that the frequency of the system clock can be calibrated in time when the USB equipment system clock has deviation in frequency, so that the USB equipment can be normally used; further, the cost of the USB equipment is reduced as only an HSI crystal oscillator is adopted by the USB equipment.

One or more techniques are provided for programming a flash memory device. In one embodiment, the memory device is programmed such that a data pattern written to a page in the memory device has encoded therein an expected count value corresponding to the number of times a first binary value occurs in the data pattern. The data pattern includes the program data and the expected count value, and is written to the page in a single operation. The expected count value may be stored in a count field in the management area of the page. During a page read operation, the expected count value is compared to the actual count of the number of bits having the first binary value in the data area of the page. If the expected count is equal to the actual count, then the program data is determined to be valid.

Various apparatuses, methods and systems for a multi-mode DAC with selectable output range, granularity and offset and controlled slew rate are disclosed herein. For example, some embodiments of the present invention provide an apparatus for supplying a reference signal, including a digital-to-analog converter, a counter and a clock. The digital-to-analog converter has a digital input and an analog output that supplies a reference signal based on the digital input. The counter has a digital control word input, a clock input, a clock enable output and a count output connected to the digital input of the digital-to-analog converter. The counter is adapted to assert the clock enable output when the digital control word input requests an output count that is different from an actual count at the count output of the counter. The clock has an enable input connected to the clock enable output of the counter and a clock output connected to the clock input of the counter. The clock is adapted to produce clock pulses on the clock output while the enable input is asserted.

An automated method for determining user satisfaction with a call comprising (1) maintaining a count of the number of times a user was asked for input during the call (the “actual count”), (2) maintaining a count of the number of times a user should have been asked for input based on the dialog path the user traversed (the “ideal count”), and (3) associating no difference between the actual count and the ideal count with maximum user satisfaction and associating increasing differences between the counts with decreasing user satisfaction. In one embodiment, if the difference between the actual count and ideal count reaches a certain threshold, the call system changes the interaction with the user.

The invention relates to an MCU internal lock calibration system and method and a PCB. The system and method are used for acquiring the actual count value of a second timer to be calibrated in an MCB to calibrate the timing time of the second timer. The method comprises the steps that reference clock square waves are loaded to one input / output interface of the MCU, a first timer of the MCU is used for counting, and counting values in one period of the reference clock square waves of the first timer are acquired; the actual counting values of the second timer are acquired according to the counting values in one period of the reference clock square waves of the first timer; the actual counting values of the second timer are stored to allow the second timer to conduct timing according to the actual counting values. The MCU internal lock calibration system and method and the PCB are low in cost and small in probability of failure.

A method and apparatus for accurately calculating packet loss along a communication channel using data in a pair of measuring packets is disclosed. The invention calculates packet loss between a first and second node over a communication circuit. A first known quantity of packets is communicated from the first node to the second node at a first known time. A first actual count of packets received by the second node from the first known quantity of packets is then determined. A second known quantity of packets is then communicated from the first node to the second node at a second known time. A second actual count of packets received by the second node from the second known quantity of packets is then determined. The difference between the first known quantity of packets communicated at the first known time and the second known quantity of packets communicated at the second known time is calculated to obtain a value for “packets sent”. The difference between the first actual count of packets received and the second actual count of packets received is calculated to obtain a value for “packets received”. The difference between the packets sent and the packets received provides a value for “packet loss” between the first known time and second known time.

The embodiment of the invention provides a vehicle counting method and device. The vehicle counting method comprises the steps that vehicle targets in current image information are determined according to the acquired current image information; when the vehicle targets are in the current image information, vehicle targets on a preset standard line in the vehicle targets are taken as vehicle targets to be counted; when at least one vehicle target is included in the vehicle targets to be counted, the previous frame image information of the current image information is used to determine the actual count value in the vehicle targets to be counted; and the sum of the actual count value and the current total count value is taken as the new total count value. An image analysis algorithm is introduced into traffic monitoring video data processing, and the video data are analyzed and processed to automatically detect and count the number of vehicles. Real-time monitoring of the road traffic flow is realized. The method is suitable for vehicle counting under complicated road conditions, and has the advantage of simple and effective operation.

A shift range controller includes a target angle setter obtaining, from an output shaft sensor, sensor signals provided by switches. The target angle setter corrects a target count value that corresponds to a requested shift range, based on the respective sensor signals. When a legitimate number of edges are detected within a signal detection range, or an edge detection window for detecting at least one of the sensor signals (e.g., P1 signal), the target angle setter calculates a post-correction target count value based on an actual count value at an edge detection timing. When the number of edges detected in the detection window is greater than the legitimate number, or, when the edge is detected at a position outside the detection window for at least one of the sensor signals, the target angle setter invalidates the correction of the target count value based at least on the one of the sensor signals.

The invention discloses a frequency synthesizer. The frequency synthesized comprises a first counter, a second counter, a controllable oscillator and a controller. The controller obtains a first time when the first counter completes N counts, calculates a target count value of the second counter in the first time according to a target frequency when outputs frequency signals, determines a target count interval of the second counter in the first time according to the target count value and then compares an actual count value completed by the second counter in the first time with the target count interval; according to the comparative result, the controller adjusts the output frequency of the controllable oscillator towards a direction close to the target frequency until the output frequency signals of the controllable oscillator reaches a target frequency meeting the precision requirements. The frequency synthesizer can reduce the requirements on loop stability and bandwidth and the design difficulties of internal modules and achieve the configurability of the precision of the output frequency signals.

Described embodiments provide for queuing tasks in a scheduling hierarchy of a network processor. A traffic manager generates a tree scheduling hierarchy having a root scheduler and N scheduler levels. The network processor generates tasks corresponding to received packets. The traffic manager performs a task enqueue operation for the task. The task enqueue operation includes adding the received task to an associated queue of the scheduling hierarchy, where the queue is associated with a data flow of the received task. The queue has a corresponding scheduler level M, where M is a positive integer less than or equal to N. Starting at the queue and iteratively repeating at each scheduling level until reaching the root scheduler, each node in the scheduling hierarchy maintains an actual count of tasks corresponding to the node. Each node communicates a capped task count to a corresponding parent scheduler at a relative next scheduler level.

The embodiment of the present invention discloses a charging method, which includes the following steps: receiving a business message; constructing a charging request according to the business message and stored system configuration information, and sending the charging request to the charging subsystem; receiving The charging subsystem processes the received service message according to the charging request processing result message returned by the charging request. The embodiment of the invention also discloses a charging system and a charging trigger device. In the present invention, since a credible charging trigger device is set up between the business subsystem and the user end, when the user end uses the service, the billing trigger device sends a charging request to the charging subsystem to trigger the actual charging. While avoiding fraudulent billing requests sent by the business subsystem, multiple types of billing methods can be implemented, which better reflects the value of different services.

The invention provides a time synchronization keeping method and a time synchronization keeping system applied to a TD-LTE. The method comprises the steps as follows: a base station acquires a time synchronization signal, the time cycle of the synchronization signal is counted by using a counter generated by a local clock, a reference timer acting in base band treatment is configured according toa ratio of the actual counted point number in the time cycle and the standard point number, and the reference timer is adjusted in real time to achieve time synchronization correction. According to the method and system provided by the invention, the increasing of cost caused by hardware revision can be avoided, the time synchronization hopping caused the common correction mode is avoided, and theperformance requirement of time synchronization keeping is also met. In addition, the scheme has no affect on the treatment of system base band, low in complexity and prone to implementation, and thenew technical means for overcoming the prejudice of the prior art is provided in the industry, and the important market value is provided.

The invention discloses a CAN bus controller. The CAN bus controller comprises a housing, a register management logic module and a detection control module, and the register management logic module and the detection control module are installed in the housing. A watchdog timer and a clock check timer are integrated in the detection control module. The watchdog timer is used for carrying out zero clearing when a microprocessor carries out read-write operation on the register management logic module, and carrying out counting in dependence on the frequency of an external crystal oscillator clock, and generating an overflow interrupt signal when the counter is overflowed; the clock check timer is used for counting the frequency of the external crystal oscillator clock, carrying out zero clearing when an external microprocessor carries out read-write operation on the clock check timer, and generating an overflow interrupt signal when the counter is overflowed The overflow interrupt signal is used for controlling the register management logic module to stop transmit-receive operation to a CAN bus, counting serves as actual counting, the external microprocessor compares actual counting with expected counting, when the actual counting is inconsistent with the expected counting, the CAN bus controller is controlled to stop transmit-receive operation to the CAN bus.

In an image display apparatus in which a display attribute of a specific area of the display can be modified based on an information input from a processor, a resolution of the image is determined from the input vertical and horizontal synchronization signals, dot clocks are generated by multiplying the horizontal synchronization signals depending on the determined resolution, a horizontal display period in one horizontal synchronization signal is detected using a signal in the image signals input from the processor, the actual count value of the dot clocks in the detected horizontal display period is compared with a standard value thereof in the horizontal display period in one line at the determined resolution of the image and the multiplication number of a dot clock generation circuit is corrected so that the count value coincides with the standard value to modify the display attribute of the specific area of the display.

The invention discloses a digital adjusting device of an RC oscillator and an adjusting method thereof, and relates to the technical field of integrated circuits. The device comprises an oscillator module, a counting module, a comparison module and an algorithm module, the oscillator module outputs a clock signal; the counting module receives the clock signal and a reference clock, counts the reference clock through the clock signal to obtain an actual counting value; the comparison module receives the actual count value and a preset target count value; wherein the comparison module is used for receiving a comparison result and outputting the comparison result to the algorithm module, the algorithm module is used for calculating an adjustment value according to the comparison result and sending the adjustment value to the oscillator module, and the oscillator module is used for adjusting the output frequency of the oscillator module according to the adjustment value. According to the technical scheme, the frequency of the RC oscillator is adjusted, the flexibility of the circuit is improved, and the power consumption of the circuit is reduced while the area of the circuit is not increased.

There is broadly contemplated herein an arrangement whereby each event source feeds a small dedicated “pre-counter” while an actual count is kept in a 64-bit wide RAM. Such an implementation preferably may involve a state machine that simply sweeps through the pre-counters, in a predetermined fixed order. Preferably, the state machine will access each pre-counter, add the value from the pre-counter to a corresponding RAM location, and then clear the pre-counter. Accordingly, the pre-counters merely have to be wide enough such that even at a maximal event rate, the pre-counter will not be able to wrap (i.e., reach capacity or overflow) before the “sweeper” state machine accesses the pre-counter.

A rotary drive for a medical device (10) includes a rotary motor (14) including a rotor (26). A rotary motion encoder (34) is connected to the rotor. The rotary motion encoder is configured to generate a number of encoder steps measuring a rotational distance of the rotor. At least one electronic processor (18) is programmed to determine at least one of a slippage value of the rotary motor measured during motor operation and a coasting value of the rotary motor measured after stopping motor operation based on comparison of an actual count of encoder steps and an expected count of encoder steps.

A system is provided for setting an appropriate delivery count rank expressing the delivery capability of a deliveryman. There is provided: a storage device that stores a delivery count rank for each deliveryman, a progress flag indicating whether or not each deliveryman is subject to a progress check, and a performance of each deliveryman in a designated period; and rank setting unit that calculates a total undelivered task count and an undelivered task rate on the basis of a total transmitted count and a total actual count included in the storage device, calculates a work attendance rate on the basis of a stipulated number of attendances and an actual number of attendances included in the storage device, and sets a delivery count rank for each deliveryman on the basis of the calculated total undelivered task count, undelivered task rate, work attendance rate, and a progress flag.