A strained sige BiCMOS integrated device and its preparation method

Abstract

The invention discloses a strained SiGe BiCMOS (bipolar complementary metal oxide semiconductor) integrated device and a preparation method. The preparation method comprises on-chip preparing a buried layer on an SOI (silicon on insulator) substrate, growing an N-type Si epitaxy, preparing deep trench isolation, and preparing a conventional Si bipolar transistor on a bipolar device region; growing a strained SiGe material on the substrate at 600 to 800 DEG C, etching the active region of an MOS (metal oxide semiconductor) device by lithography, adjusting the threshold value of the MOS device region by ion implantation process, depositing SiO2 and polysilicon on the active region of the MOS device, etching to form a pseudo gate, preparing the source and drain region of the MOS device by self-alignment process respectively, growing a SiO2 layer on the substrate surface, removing the pseudo gate, preparing La2O3 in the impressed groove of the pseudo gate to obtain a gate dielectric, preparing a gate from the gate dielectric and tungsten (W), etching a passivation layer to form the lead holes of the drain, source and gate, metalizing, sputtering metal, and etching leads by lithography to obtain the strained SiGe BiCMOS integrated device and circuit.

Description

technical field [0001] The invention belongs to the technical field of semiconductor integrated circuits, in particular to a strained SiGe BiCMOS integrated device and a preparation method. Background technique [0002] Semiconductor integrated circuit technology is the core technology of high-tech and information industry, and has become an important symbol to measure a country's scientific and technological level, comprehensive national strength and national defense strength, while microelectronic technology represented by integrated circuits is the key to semiconductor technology; Industry is the basic industry of the country. The reason why it develops so fast is not only the huge contribution of technology itself to economic development, but also its wide applicability. [0003] Gordon Moore, one of the founders of Intel, proposed "Moore's Law" in 1965, which states that the number of transistors on an integrated circuit chip doubles about every 18 months, and the perfo...

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Problems solved by technology

[0004] However, with the continuous development of integrated circuit technology, the feature size of the chip continues to shrink. In the miniaturization process of the Si chip manufacturing industry, it is faced with the challenges of material physical properties, manufacturing process technology, device structure, etc.; for example, when the feature size is smaller than Due to problems such as tunneling leakage current and reliability when it is below 100nm, the traditional gate dielectric material SiO 2 It cannot meet the requirements of low power consumption; the short channel effect and narrow channel effect of nanometer devices are becoming more and more obvious, which seriously affects the device performance; traditional lithography technology cannot meet the increasingly shrinking lithography precision; It is becoming more and more difficult to meet the needs of the design

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