A floating gate
flash memory device including a substrate comprising a source region, a drain region, and a channel region positioned therebetween; a floating gate
electrode positioned above the channel region and separated from the channel region by a tunnel
dielectric material layer; and a control gate
electrode positioned above the floating gate
electrode and separated from the floating gate electrode by an interpoly
dielectric layer, the interpoly
dielectric layer comprising a modified ONO structure having a bottom dielectric material layer adjacent to the floating gate electrode, a top dielectric material layer adjacent to the control gate electrode, and a center layer comprising a
nitride and positioned between the bottom dielectric material layer and the top dielectric material layer, in which the tunnel dielectric material layer, and at least one of the bottom dielectric material layer and the top dielectric material layer, comprise a high-K dielectric material.