58results about How to "Large inductance" patented technology

A surface mounting type planar magnetic device comprised of upper ferrite magnetic film, lower ferrite magnetic film and a planar coil interposed therebetween. For applying surface mount technology, an opening is formed in the upper ferrite magnetic film above a coil terminal portion and then, an external electrode conductive with the coil terminal portion through the opening is formed on the upper ferrite magnetic film. Further, this surface mounting type planar magnetic device is of a thin structure and can be mounted on the surface of a printed board. Its power loss is small, its inductance is large, its frequency characteristic is excellent, the disparity of the characteristic is small and its reliability is excellent.

A reactor provided with a cooler, comprising: a coil, a core formed of a soft magnetic material, the core covers an inside of the coil and an outer periphery of the coil; the cooler being arranged on both sides of the core, the core and the cooler being pressed in a stacking direction of the core and the cooler; a thickness of the core in the stacking direction being smaller than a length of a height of a surface of the core that faces the stacking direction; and the thickness of the core in the stacking direction being smaller than a length of a width of the surface of the core that faces the stacking direction.

Disclosed is a structural vibration damping device, which comprises a piezoelectric element adapted to be mounted on a structure, a shunt circuit inserted between two electrodes of the piezoelectric element, and an electric circuit for selectively opening and closing the shunt circuit. In this damping device, the electric circuit is operable, when a voltage between the electrodes of the piezoelectric element has a positive or negative extreme value due to a vibration of the structure, to close the shunt circuit so as to allow a current to flow between the electrodes of the piezoelectric element, and, when the current is reduced to zero, to open the shunt circuit so as to preclude the current flow until a voltage between the electrodes of the piezoelectric element subsequently has the extreme value. Further, each of the shunt circuit and the electric circuit is designed to be operated using only a power generated by the piezoelectric element. The damping device of the present invention makes it possible to achieve high-performance power-free damping with enhanced reliability and maintainability.

A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic / superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.

A multi-state phase shifter circuit having both low insertion loss (IL) and good return loss. Two or more phase shift elements are combined into a single cell architecture to reduce the number of series-connected FET switches and reduce the total IL. One embodiment has two ports connected by parallel signal paths each comprising a pair of switches and a phase shift element comprising, for example, an inductor, a capacitor, a transmission line, or a conductor. Another embodiment has two ports connected by parallel signal paths each comprising a switch and at least one associated phase shift element. The switches in each parallel signal path allow the associated phase shift element to be placed in-circuit under the control of an applied signal. The sets of switches may be independently controlled, so that multiple parallel signal paths may be switched into circuit between the phase shifter circuit ports at the same time.

The configurations of an inverter circuit are provided in the present invention. The proposed circuit includes a first bridge arm having a first sub-bridge arm with a first switch and a first middle point coupled to the first switch, and a second sub-bridge arm with a second switch and a second middle point coupled to the second switch, a first inductor having a first terminal coupled to the first middle point and a second terminal, and a second inductor having a first terminal coupled to the second middle point, and a second terminal coupled to the second terminal of the first inductor and outputting an AC voltage.