Easy-resist removing high-energy ion implantation multilayer mask manufacturing method

A multi-layer mask, high-energy ion technology, used in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of complex and difficult processes, multiple lithography and etching, etc.

Active Publication Date: 2018-01-23
SHANGHAI INST OF TECHNICAL PHYSICS - CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although the hard implant mask does not have the problem of chapped denaturation under attack, its process is complicated, requiring multiple photolithography and etching, which introduces a larger size error of the implant region and increases the manufacturing cost.
Therefore, it is necessary to consider the use of process solutions other than the prior art to solve the problems of high-energy ion implantation photoresist mask variability and difficult deglue

Method used

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  • Easy-resist removing high-energy ion implantation multilayer mask manufacturing method
  • Easy-resist removing high-energy ion implantation multilayer mask manufacturing method
  • Easy-resist removing high-energy ion implantation multilayer mask manufacturing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0026] A 40nm thick cadmium telluride thin film is thermally evaporated and deposited on the substrate as an injection barrier layer, and then a 70nm thick zinc sulfide thin film is thermally evaporated and deposited as a sacrificial transition layer, according to the thickness of the sacrificial transition layer zinc sulfide≤implantation area Outer expansion error limit / tan (ion incident angle), for an implantation region outreach error of 0.1 μm and an implantation inclination angle of 7°, the condition is satisfied if the thickness of the zinc sulfide layer is less than 800 nm.

[0027] Clean and dry the chip on which the injection barrier layer and sacrificial transition layer have been deposited, spin-coat photoresist AZ1500 on the surface of the chip, and selectively expose and develop the chip to define the photoresist mask injection Area.

[0028] Using the photoresist injection area pattern as an etching mask, use pure hydrochloric acid at 0°C to corrode the injection...

Embodiment 2

[0031] A 300nm thick cadmium telluride thin film is thermally evaporated and deposited on the substrate as an injection barrier layer, and then a 300nm thick zinc sulfide thin film is thermally evaporated deposited as a sacrificial transition layer, according to the thickness of the sacrificial transition layer zinc sulfide ≤ implantation area Outer expansion error limit / tan (ion incident angle), for an implantation region outreach error of 0.1 μm and an implantation inclination angle of 7°, the condition is satisfied if the thickness of the zinc sulfide layer is less than 800 nm.

[0032] Clean and dry the chip on which the injection barrier layer and sacrificial transition layer have been deposited, spin-coat photoresist AZ5200 on the surface of the chip, and selectively expose and develop the chip to define the photoresist mask injection Area.

[0033]Using the photoresist implanted area pattern as an etching mask, use pure hydrochloric acid at 0°C to corrode the implanted ...

Embodiment 3

[0036] A 200nm-thick cadmium telluride thin film is thermally evaporated and deposited on the substrate as an injection barrier layer, and then a 70nm-thick zinc sulfide thin film is thermally evaporated deposited as a sacrificial transition layer, according to the thickness of the sacrificial transition layer zinc sulfide≤implantation area Outer expansion error limit / tan (ion incident angle), for an implantation region outreach error of 0.1 μm and an implantation inclination angle of 7°, the condition is satisfied if the thickness of the zinc sulfide layer is less than 800 nm.

[0037] Clean and dry the chip on which the injection barrier layer and sacrificial transition layer have been deposited, spin-coat photoresist AZ5200 on the surface of the chip, and selectively expose and develop the chip to define the photoresist mask injection Area.

[0038] Using the photoresist implanted region pattern as an etching mask, Ar:CH 4 :H 2 The mixed gas is an etching gas, and the zin...

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PUM

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Abstract

The invention discloses an easy-resist removing high-energy ion implantation multilayer mask manufacturing method. The multilayer mask is a photoresist multilayer mask with a flange-type cross section. The mask manufacturing process comprises steps: a sacrificial transition layer dielectric film is manufactured on an implantation barrier layer; a graphical photoresist mask is manufactured on the transition dielectric film; wet etching or wet etching-assisted plasma dry etching is adopted, the photoresist graph is used as the mask, the sacrificial transition layer is etched, and through controlling the etching rate and the time, the graph edge of the sacrificial transition layer is indented for a fixed width in relative to the photoresist mask, and a three-layer composite mask with a flange-type side wall structure is manufactured. Due to the composite mask of the invention, difficult resist removing caused by photoresist mask edge denaturation under high energy ion bombardment can be avoided, the photoresist mask can be completely removed through conventional resist removing liquid soaking, the mechanical damages caused by cleaning the surface of a chip are avoided and the surfacequality of the chip is improved.

Description

technical field [0001] The invention relates to mask technology in microelectronic technology, in particular to a method for preparing a high-energy ion implantation multilayer mask with implantation energy greater than 200keV. Background technique [0002] In the microelectronics process, ion implantation doping technology has high-precision dopant dose uniformity and process repeatability, and ion implantation is a non-equilibrium process, so that the doping process is not affected by factors such as solid solubility and diffusion coefficient , in theory, any concentration doping on the surface of any material substrate can be achieved. The implantation depth or average projected range of ions is related to the atomic weight of the implanted ions, implantation energy, and the atomic mass of the implanted matrix material, that is, the lighter the implanted ions, the smaller the atomic mass of the matrix material, and the greater the ion implantation energy, the deeper the i...

Claims

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Application Information

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IPC IPC(8): H01L21/033
Inventor 施长治
Owner SHANGHAI INST OF TECHNICAL PHYSICS - CHINESE ACAD OF SCI
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