Longitudinal NPN triggered high-voltage ESD protective device with high maintaining voltage

Abstract

The invention discloses a longitudinal NPN triggered high-voltage ESD (Electronic Static Discharge) protective device with high maintaining voltage. The protective device can be used for an on-chip IC (Integrated Circuit) high-voltage ESD protective circuit and mainly comprises a substrate Psub, an N buried layer, P epitaxy, an N sink, a high-voltage deep N well, a first N+ injection region, a first P+ injection region, a second N+ injection region, a third N+ injection region, a polysilicon gate, thin gate oxide and a plurality of field oxide isolation regions. A reverse PN junction of an internal longitudinal NPN structure of the protective device is triggered and switched on under a high-voltage ESD pulse action to form a plurality of ESD current discharge paths connected in parallel, so that secondary breakdown current of the device can be raised, the switch-on resistance can be reduced, and the robustness of the device can be improved. The current path of the device after triggering and switch-on is extended by extending the length of the polysilicon gate of an LDMOS (laterally diffused metal oxide semiconductor) device, increasing the base width of the NPN structure, and employing the N buried layer and the N sink, the electric field distribution in the device is changed, and the voltage endurance capability and maintaining voltage of the device are improved and increased.

Description

technical field [0001] The invention belongs to the field of electrostatic protection of integrated circuits and relates to a high-voltage ESD protection device, in particular to a high-voltage ESD protection device with high sustain voltage triggered by a longitudinal NPN, which can be used to improve the reliability of on-chip IC high-voltage ESD protection. Background technique [0002] LDMOS and VDMOS power field effect devices are new power devices developed rapidly at the end of the last century. With the continuous increase of power, capacity and performance of power semiconductor devices, their application range is also expanding. In low-frequency and high-power fields such as high-voltage DC power supply and motor drive, power devices are indispensable and important semiconductor devices. However, in the process of engineering application, circuit function failure or damage is often caused by some "accidental" factors. After investigation, in addition to the easily...

AI Technical Summary

Problems solved by technology

However, the practice in ESD protection applications has proved that the ESD protection performance of LDMOS devices is poor, and a small number of LDMOS devices are damaged because of their low gate oxide resistance to breakdown and cannot withstand the impact of high-voltage ESD pulses.

Even though most LDMOS have improved the device’s gate oxide resistance to breakdown through field plate technology or reduced surface field (RESURF) technology, most LDMOS devices are still under the action of high-voltage ESD pulses. Once the hysteresis is triggered, the device will be damaged. , the robustness is weak, and it cannot reach the electrostatic protection standard that the electronic product requires that the human body model is not lower than 2000V.

Although a high-voltage ESD protection device combining SCR-LDMOS two structures has been proposed in recent years, the robustness of this device has been greatly improved compared with that of single-structure LDMOS, but the sustaining voltage is still low. Still risk of high trigger voltage, low hold voltage, prone to latch-up

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